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Searched refs:l2_idx (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/media/pci/intel/ipu6/
H A Dipu6-mmu.c98 u32 l2_idx; in page_table_dump() local
110 for (l2_idx = 0; l2_idx < ISP_L2PT_PTES; l2_idx++) { in page_table_dump()
112 u32 iova2 = iova + (l2_idx << ISP_L2PT_SHIFT); in page_table_dump()
114 if (l2_pt[l2_idx] == mmu_info->dummy_page_pteval) in page_table_dump()
119 l2_idx, iova2, in page_table_dump()
120 TBL_PHYS_ADDR(l2_pt[l2_idx])); in page_table_dump()
261 unsigned int l2_idx; in l2_unmap() local
282 for (l2_idx = (iova & ISP_L2PT_MASK) >> ISP_L2PT_SHIFT; in l2_unmap()
283 size > 0 && l2_idx < ISP_L2PT_PTES; l2_idx++) { in l2_unmap()
284 phys_addr_t pteval = TBL_PHYS_ADDR(l2_pt[l2_idx]); in l2_unmap()
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/linux/drivers/staging/media/ipu7/
H A Dipu7-mmu.c244 unsigned int l2_idx; in l2_unmap() local
265 for (l2_idx = (iova & ISP_L2PT_MASK) >> ISP_L2PT_SHIFT; in l2_unmap()
266 size > 0U && l2_idx < ISP_L2PT_PTES; l2_idx++) { in l2_unmap()
267 phys_addr_t pteval = TBL_PHYS_ADDR(l2_pt[l2_idx]); in l2_unmap()
271 l2_idx, &pteval); in l2_unmap()
272 l2_pt[l2_idx] = mmu_info->dummy_page_pteval; in l2_unmap()
281 clflush_cache_range(&l2_pt[l2_idx - l2_entries], in l2_unmap()
295 unsigned int l2_idx; in l2_map() local
345 for (l2_idx = (iova & ISP_L2PT_MASK) >> ISP_L2PT_SHIFT; in l2_map()
346 size && l2_idx < ISP_L2PT_PTES; l2_idx++) { in l2_map()
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/linux/drivers/staging/media/atomisp/include/mmu/
H A Disp_mmu.h45 #define ISP_PT_TO_VIRT(l1_idx, l2_idx, offset) do {\ argument
47 ((l2_idx) << ISP_L2PT_OFFSET) | \
/linux/drivers/staging/media/atomisp/pci/mmu/
H A Disp_mmu.c133 phys_addr_t l2_pt, unsigned int l2_idx, in mmu_remap_error() argument
145 (u64)l2_pt, l2_idx, isp_virt, in mmu_remap_error()
152 phys_addr_t l2_pt, unsigned int l2_idx, in mmu_unmap_l2_pte_error() argument
162 (u64)l2_pt, l2_idx, isp_virt, in mmu_unmap_l2_pte_error()
/linux/drivers/gpu/drm/imagination/
H A Dpvr_mmu.c1383 u16 l2_idx; member
1486 op_ctx->curr_page.l2_idx); in pvr_page_table_l2_insert()
1492 child_table->parent_idx = op_ctx->curr_page.l2_idx; in pvr_page_table_l2_insert()
1493 l2_table->entries[op_ctx->curr_page.l2_idx] = child_table; in pvr_page_table_l2_insert()
1745 op_ctx->curr_page.l2_idx)) { in pvr_page_table_l1_get_or_insert()
1747 l2_table->entries[op_ctx->curr_page.l2_idx]; in pvr_page_table_l1_get_or_insert()
2154 op_ctx->curr_page.l2_idx = pvr_page_table_l2_idx(device_addr); in pvr_mmu_op_context_set_curr_page()
2206 if (++op_ctx->curr_page.l2_idx != ROGUE_MMUCTRL_ENTRIES_PC_VALUE) in pvr_mmu_op_context_next_page()
/linux/drivers/irqchip/
H A Dirq-gic-v5-its.c346 unsigned int l1_idx, l2_idx, l2_bits; in gicv5_its_device_get_itte_ref() local
357 l2_idx = event_id & GENMASK(l2_bits - 1, 0); in gicv5_its_device_get_itte_ref()
360 return &l2_itt[l2_idx]; in gicv5_its_device_get_itte_ref()
424 unsigned int l2sz, l2_bits, l1_idx, l2_idx; in gicv5_its_devtab_get_dte_ref() local
436 l2_idx = device_id & GENMASK(l2_bits - 1, 0); in gicv5_its_devtab_get_dte_ref()
451 return &l2devtab[l2_idx]; in gicv5_its_devtab_get_dte_ref()
/linux/drivers/infiniband/hw/hns/
H A Dhns_roce_hem.h85 u32 l2_idx; /* level 2 base address table index */ member
H A Dhns_roce_hem.c229 mhop->l2_idx = table_idx & (chunk_ba_num - 1); in hns_roce_calc_hem_mhop()
301 u32 l0_idx, l1_idx, l2_idx; in calc_hem_config() local
312 l2_idx = mhop->l2_idx; in calc_hem_config()
320 l1_idx * chunk_ba_num + l2_idx; in calc_hem_config()
426 *(table->bt_l1[index->l1] + mhop->l2_idx) = bt_ba; in alloc_mhop_hem()
H A Dhns_roce_hw_v2.c4409 k = mhop.l2_idx; in hns_roce_v2_set_hem()