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/linux/Documentation/translations/zh_CN/kbuild/
H A Dgcc-plugins.rst5 :Original: Documentation/kbuild/gcc-plugins.rst
31 .. [1] https://gcc.gnu.org/onlinedocs/gccint/Plugins.html
32 .. [2] https://gcc.gnu.org/onlinedocs/gccint/Plugin-API.html#Plugin-API
33 .. [3] https://gcc.gnu.org/onlinedocs/gccint/GIMPLE.html
34 .. [4] https://gcc.gnu.org/onlinedocs/gccint/IPA.html
35 .. [5] https://gcc.gnu.org/onlinedocs/gccint/RTL.html
62 **$(src)/scripts/gcc-plugins**
66 **$(src)/scripts/gcc-plugins/gcc-common.h**
71 **$(src)/scripts/gcc-plugins/gcc-generate-gimple-pass.h,
72 $(src)/scripts/gcc-plugins/gcc-generate-ipa-pass.h,
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dipq9574.dtsi11 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
14 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
246 clocks = <&gcc GCC_PCIE0_AUX_CLK>,
247 <&gcc GCC_PCIE0_AHB_CLK>,
248 <&gcc GCC_PCIE0_PIPE_CLK>;
251 assigned-clocks = <&gcc GCC_PCIE0_AUX_CLK>;
254 resets = <&gcc GCC_PCIE0_PHY_BCR>,
255 <&gcc GCC_PCIE0PHY_PHY_BCR>;
269 clocks = <&gcc GCC_PCIE2_AUX_CLK>,
270 <&gcc GCC_PCIE2_AHB_CLK>,
[all …]
H A Dipq5424.dtsi12 #include <dt-bindings/clock/qcom,ipq5424-gcc.h>
13 #include <dt-bindings/reset/qcom,ipq5424-gcc.h>
237 clocks = <&gcc GCC_PCIE0_AUX_CLK>,
238 <&gcc GCC_PCIE0_AHB_CLK>,
239 <&gcc GCC_PCIE0_PIPE_CLK>;
244 assigned-clocks = <&gcc GCC_PCIE0_AUX_CLK>;
247 resets = <&gcc GCC_PCIE0_PHY_BCR>,
248 <&gcc GCC_PCIE0PHY_PHY_BCR>;
263 clocks = <&gcc GCC_PCIE1_AUX_CLK>,
264 <&gcc GCC_PCIE1_AHB_CLK>,
[all …]
H A Dipq8074.dtsi7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
130 clocks = <&gcc GCC_USB1_AUX_CLK>,
132 <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
133 <&gcc GCC_USB1_PIPE_CLK>;
142 resets = <&gcc GCC_USB1_PHY_BCR>,
143 <&gcc GCC_USB3PHY_1_PHY_BCR>;
155 clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
159 resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
167 clocks = <&gcc GCC_USB0_AUX_CLK>,
169 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
[all …]
H A Dipq5332.dtsi9 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
161 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
163 resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
225 clocks = <&gcc GCC_PRNG_AHB_CLK>;
259 clocks = <&gcc GCC_PCIE3X1_0_PIPE_CLK>,
260 <&gcc GCC_PCIE3X1_PHY_AHB_CLK>;
262 resets = <&gcc GCC_PCIE3X1_0_PHY_BCR>,
263 <&gcc GCC_PCIE3X1_PHY_AHB_CLK_ARES>,
264 <&gcc GCC_PCIE3X1_0_PHY_PHY_BCR>;
279 clocks = <&gcc GCC_PCIE3X2_PIPE_CLK>,
[all …]
H A Dipq5018.dtsi9 #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
12 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
173 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
175 resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
186 clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
188 resets = <&gcc GCC_PCIE1_PHY_BCR>,
189 <&gcc GCC_PCIE1PHY_PHY_BCR>;
203 clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
205 resets = <&gcc GCC_PCIE0_PHY_BCR>,
206 <&gcc GCC_PCIE0PHY_PHY_BCR>;
[all …]
H A Dipq6018.dtsi9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
238 clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
242 resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
250 clocks = <&gcc GCC_USB0_AUX_CLK>,
252 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
253 <&gcc GCC_USB0_PIPE_CLK>;
262 resets = <&gcc GCC_USB0_PHY_BCR>,
263 <&gcc GCC_USB3PHY_0_PHY_BCR>;
275 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
[all …]
H A Dsc8180x.dtsi9 #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
790 gcc: clock-controller@100000 { label
791 compatible = "qcom,gcc-sc8180x";
808 clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
809 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
820 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
835 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
849 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
861 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
876 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
[all …]
H A Dmsm8939.dtsi8 #include <dt-bindings/clock/qcom,gcc-msm8939.h>
13 #include <dt-bindings/reset/qcom,gcc-msm8939.h>
234 clocks = <&gcc GCC_CRYPTO_CLK>,
235 <&gcc GCC_CRYPTO_AXI_CLK>,
236 <&gcc GCC_CRYPTO_AHB_CLK>;
489 clocks = <&gcc GCC_PRNG_AHB_CLK>;
1201 gcc: clock-controller@1800000 { label
1202 compatible = "qcom,gcc-msm8939";
1243 clocks = <&gcc GCC_MDSS_AHB_CLK>,
1244 <&gcc GCC_MDSS_AXI_CLK>,
[all …]
H A Dqcs404.dtsi7 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
316 clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>;
334 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
335 <&gcc GCC_USB3_PHY_PIPE_CLK>;
337 resets = <&gcc GCC_USB3_PHY_BCR>,
338 <&gcc GCC_USB3PHY_PHY_BCR>;
348 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
349 <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
351 resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
352 <&gcc GCC_USB2A_PHY_BCR>;
[all …]
H A Dmsm8916.dtsi8 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
13 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
258 clocks = <&gcc GCC_CRYPTO_CLK>,
259 <&gcc GCC_CRYPTO_AXI_CLK>,
260 <&gcc GCC_CRYPTO_AHB_CLK>;
448 clocks = <&gcc GCC_PRNG_AHB_CLK>;
1514 gcc: clock-controller@1800000 { label
1515 compatible = "qcom,gcc-msm8916";
1554 power-domains = <&gcc MDSS_GDSC>;
1556 clocks = <&gcc GCC_MDSS_AHB_CLK>,
[all …]
H A Dsc8280xp.dtsi8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
834 clocks = <&gcc GCC_EMAC0_AXI_CLK>,
835 <&gcc GCC_EMAC0_SLV_AHB_CLK>,
836 <&gcc GCC_EMAC0_PTP_CLK>,
837 <&gcc GCC_EMAC0_RGMII_CLK>;
848 power-domains = <&gcc EMAC_0_GDSC>;
858 gcc: clock-controller@100000 { label
859 compatible = "qcom,gcc-sc8280xp";
950 clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,
951 <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
[all …]
H A Dmsm8976.dtsi10 #include <dt-bindings/clock/qcom,gcc-msm8976.h>
210 clocks = <&gcc GCC_CRYPTO_CLK>,
211 <&gcc GCC_CRYPTO_AXI_CLK>,
212 <&gcc GCC_CRYPTO_AHB_CLK>;
476 clocks = <&gcc GCC_PRNG_AHB_CLK>;
490 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
491 <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
493 resets = <&gcc RST_QUSB2_PHY_BCR>,
494 <&gcc RST_USB2_HS_PHY_ONLY_BCR>;
852 gcc: clock-controller@1800000 { label
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019.dtsi8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
54 clocks = <&gcc GCC_APPS_CLK_SRC>;
67 clocks = <&gcc GCC_APPS_CLK_SRC>;
80 clocks = <&gcc GCC_APPS_CLK_SRC>;
93 clocks = <&gcc GCC_APPS_CLK_SRC>;
184 gcc: clock-controller@1800000 { label
185 compatible = "qcom,gcc-ipq4019";
196 clocks = <&gcc GCC_PRNG_AHB_CLK>;
229 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
230 <&gcc GCC_SDCC1_APPS_CLK>,
[all …]
H A Dqcom-ipq8064.dtsi7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
360 clocks = <&gcc RPM_MSG_RAM_H_CLK>;
499 gcc: clock-controller@900000 { label
500 compatible = "qcom,gcc-ipq8064", "syscon";
557 compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon";
559 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
567 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
581 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
602 clocks = <&gcc USB30_0_MASTER_CLK>;
[all …]
H A Dqcom-msm8660.dtsi6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
22 enable-method = "qcom,gcc-msm8660";
30 enable-method = "qcom,gcc-msm8660";
113 gcc: clock-controller@900000 { label
114 compatible = "qcom,gcc-msm8660";
126 clocks = <&gcc GSBI1_H_CLK>;
140 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
152 clocks = <&gcc GSBI3_H_CLK>;
165 clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>;
177 clocks = <&gcc GSBI6_H_CLK>;
[all …]
H A Dqcom-mdm9615.dtsi12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
102 gcc: clock-controller@900000 { label
103 compatible = "qcom,gcc-mdm9615";
117 <&gcc PLL4_VOTE>,
133 compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon";
140 clocks = <&gcc PRNG_CLK>;
142 assigned-clocks = <&gcc PRNG_CLK>;
150 clocks = <&gcc GSBI2_H_CLK>;
164 clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
[all …]
H A Dqcom-msm8960.dtsi5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
301 gcc: clock-controller@900000 { label
302 compatible = "qcom,gcc-msm8960", "syscon";
348 compatible = "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc", "syscon";
350 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
358 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
377 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
400 <&gcc PLL3>,
401 <&gcc PLL8_VOTE>,
[all …]
H A Dqcom-apq8064.dtsi4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
367 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
376 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
385 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
394 clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
450 clocks = <&gcc GSBI1_H_CLK>;
463 clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
475 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
489 clocks = <&gcc GSBI2_H_CLK>;
[all …]
H A Dqcom-sdx55.dtsi9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
196 gcc: clock-controller@100000 { label
197 compatible = "qcom,gcc-sdx55";
210 clocks = <&gcc 30>,
211 <&gcc 9>;
226 resets = <&gcc GCC_QUSB2PHY_BCR>;
233 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
234 <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
235 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
236 <&gcc GCC_USB3_PHY_PIPE_CLK>;
[all …]
H A Dqcom-sdx65.dtsi9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
204 gcc: clock-controller@100000 { label
205 compatible = "qcom,gcc-sdx65";
226 clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
238 resets = <&gcc GCC_QUSB2PHY_BCR>;
246 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
247 <&gcc GCC_USB3_PRIM_CLKREF_EN>,
248 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
249 <&gcc GCC_USB3_PHY_PIPE_CLK>;
258 resets = <&gcc GCC_USB3_PHY_BCR>,
[all …]
/linux/Documentation/kbuild/
H A Dgcc-plugins.rst26 .. [1] https://gcc.gnu.org/onlinedocs/gccint/Plugins.html
27 .. [2] https://gcc.gnu.org/onlinedocs/gccint/Plugin-API.html#Plugin-API
28 .. [3] https://gcc.gnu.org/onlinedocs/gccint/GIMPLE.html
29 .. [4] https://gcc.gnu.org/onlinedocs/gccint/IPA.html
30 .. [5] https://gcc.gnu.org/onlinedocs/gccint/RTL.html
64 **$(src)/scripts/gcc-plugins**
68 **$(src)/scripts/gcc-plugins/gcc-common.h**
71 It should be always included instead of individual gcc headers.
73 **$(src)/scripts/gcc-plugins/gcc-generate-gimple-pass.h,
74 $(src)/scripts/gcc-plugins/gcc-generate-ipa-pass.h,
[all …]
/linux/Documentation/translations/zh_TW/process/
H A Dprogramming-language.rst14 內核是用C語言 :ref:`c-language <tw_c-language>` 編寫的。更準確地說，內核通常是用 :ref:`gcc <tw_gcc>`
15 在 ``-std=gnu11`` :ref:`gcc-c-dialect-options <tw_gcc-c-dialect-options>` 下編譯的：ISO C11的 GNU 方言
25 在整個內核中使用的一個常見擴展是屬性（attributes） :ref:`gcc-attribute-syntax <tw_gcc-attribute-syntax>`
43 gcc
44 https://gcc.gnu.org
59 https://gcc.gnu.org/onlinedocs/gcc/C-Dialect-Options.html
64 https://gcc.gnu.org/onlinedocs/gcc/C-Extensions.html
68 gcc-attribute-syntax
69 https://gcc.gnu.org/onlinedocs/gcc/Attribute-Syntax.html
/linux/scripts/
H A DMakefile.gcc-plugins3 gcc-plugin-$(CONFIG_GCC_PLUGIN_LATENT_ENTROPY) += latent_entropy_plugin.so
4 gcc-plugin-cflags-$(CONFIG_GCC_PLUGIN_LATENT_ENTROPY) \
13 …CFLAGS := $(strip $(addprefix -fplugin=$(objtree)/scripts/gcc-plugins/, $(gcc-plugin-y)) $(gcc-plu…
21 gcc-plugin-external-$(CONFIG_GCC_PLUGIN_RANDSTRUCT) \
23 gcc-plugin-external-$(CONFIG_GCC_PLUGIN_STACKLEAK) \
28 GCC_PLUGIN := $(gcc-plugin-y) $(gcc-plugin-external-y)
/linux/Documentation/devicetree/bindings/net/
H A Dqcom-emac.txt41 clocks = <&gcc 0>, <&gcc 1>, <&gcc 3>, <&gcc 4>, <&gcc 5>,
42 <&gcc 6>, <&gcc 7>;
90 clocks = <&gcc 0>, <&gcc 1>, <&gcc 3>, <&gcc 4>, <&gcc 5>,
91 <&gcc 6>, <&gcc 7>;

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