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Searched refs:flush_mask (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_ctl.c39 u32 flush_mask; member
474 u32 flush_mask) in fix_sw_flush() argument
479 (!(ctl_mgr->flush_hw_mask & bit) && (flush_mask & bit)) in fix_sw_flush()
488 static void fix_for_single_flush(struct mdp5_ctl *ctl, u32 *flush_mask, in fix_for_single_flush() argument
494 DBG("CTL %d FLUSH pending mask %x", ctl->id, *flush_mask); in fix_for_single_flush()
496 ctl_mgr->single_flush_pending_mask |= (*flush_mask); in fix_for_single_flush()
497 *flush_mask = 0; in fix_for_single_flush()
501 *flush_mask = ctl_mgr->single_flush_pending_mask; in fix_for_single_flush()
507 DBG("Single FLUSH mask %x,ID %d", *flush_mask, in fix_for_single_flush()
538 u32 flush_mask, bool start) in mdp5_ctl_commit() argument
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H A Dmdp5_crtc.c91 static u32 crtc_flush(struct drm_crtc *crtc, u32 flush_mask) in crtc_flush() argument
100 DBG("%s: flush=%08x", crtc->name, flush_mask); in crtc_flush()
102 return mdp5_ctl_commit(ctl, pipeline, flush_mask, start); in crtc_flush()
115 uint32_t flush_mask = 0; in crtc_flush_all() local
124 flush_mask |= mdp5_plane_get_flush(plane); in crtc_flush_all()
128 flush_mask |= mdp_ctl_flush_mask_lm(mixer->lm); in crtc_flush_all()
132 flush_mask |= mdp_ctl_flush_mask_lm(r_mixer->lm); in crtc_flush_all()
134 return crtc_flush(crtc, flush_mask); in crtc_flush_all()
961 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0); in mdp5_crtc_cursor_set() local
1024 crtc_flush(crtc, flush_mask); in mdp5_crtc_cursor_set()
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H A Dmdp5_mixer.h20 uint32_t flush_mask; /* used to commit LM registers */ member
H A Dmdp5_pipe.h23 uint32_t flush_mask; /* used to commit pipe registers */ member
H A Dmdp5_ctl.h72 u32 flush_mask, bool start);
H A Dmdp5_mixer.c161 mixer->flush_mask = mdp_ctl_flush_mask_lm(lm->id); in mdp5_mixer_init()
H A Dmdp5_pipe.c168 hwpipe->flush_mask = mdp_ctl_flush_mask_pipe(pipe); in mdp5_pipe_init()
H A Dmdp5_plane.c983 mask = pstate->hwpipe->flush_mask; in mdp5_plane_get_flush()
986 mask |= pstate->r_hwpipe->flush_mask; in mdp5_plane_get_flush()
/linux/fs/xfs/scrub/
H A Dtempfile.c490 xfs_fileoff_t flush_mask; in xrep_tempfile_copyin() local
498 flush_mask = XFS_B_TO_FSBT(mp, (1U << 19)) - 1; in xrep_tempfile_copyin()
533 if (!(off & flush_mask)) { in xrep_tempfile_copyin()
/linux/drivers/net/wireless/mediatek/mt76/mt7603/
H A Dmac.c183 u32 flush_mask; in mt7603_filter_tx() local
199 flush_mask = MT_WF_ARB_TX_FLUSH_AC0 | in mt7603_filter_tx()
203 flush_mask <<= mac_idx; in mt7603_filter_tx()
205 mt76_wr(dev, MT_WF_ARB_TX_FLUSH_0, flush_mask); in mt7603_filter_tx()
206 mt76_poll(dev, MT_WF_ARB_TX_FLUSH_0, flush_mask, 0, 20000); in mt7603_filter_tx()
207 mt76_wr(dev, MT_WF_ARB_TX_START_0, flush_mask); in mt7603_filter_tx()
/linux/drivers/infiniband/hw/irdma/
H A Dhw.c2842 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask) in irdma_flush_wqes() argument
2848 if ((!(flush_mask & IRDMA_FLUSH_SQ) && in irdma_flush_wqes()
2849 !(flush_mask & IRDMA_FLUSH_RQ)) || in irdma_flush_wqes()
2850 ((flush_mask & IRDMA_REFLUSH) && rf->rdma_ver >= IRDMA_GEN_3)) in irdma_flush_wqes()
2854 info.sq = flush_mask & IRDMA_FLUSH_SQ; in irdma_flush_wqes()
2855 info.rq = flush_mask & IRDMA_FLUSH_RQ; in irdma_flush_wqes()
2868 if (flush_mask & IRDMA_REFLUSH) { in irdma_flush_wqes()
2888 flush_mask & IRDMA_FLUSH_WAIT); in irdma_flush_wqes()
H A Dmain.h496 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);