| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ ! |
| H A D | dcn201_resource.c | 967 if (pool->base.dpps[i] != NULL) in dcn201_resource_destruct()
968 dcn201_dpp_destroy(&pool->base.dpps[i]); in dcn201_resource_destruct()
1057 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn201_acquire_free_pipe_for_layer()
1058 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn201_acquire_free_pipe_for_layer()
1256 pool->base.dpps[i] = dcn201_dpp_create(ctx, i); in dcn201_resource_construct()
1257 if (pool->base.dpps[i] == NULL) { in dcn201_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/ ! |
| H A D | dcn10_resource.c | 957 if (pool->base.dpps[i] != NULL) in dcn10_resource_destruct()
958 dcn10_dpp_destroy(&pool->base.dpps[i]); in dcn10_resource_destruct()
1138 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn10_acquire_free_pipe_for_layer()
1139 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn10_acquire_free_pipe_for_layer()
1619 pool->base.dpps[j] = dcn10_dpp_create(ctx, i); in dcn10_resource_construct()
1620 if (pool->base.dpps[j] == NULL) { in dcn10_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ ! |
| H A D | dcn20_resource.c | 1142 if (pool->base.dpps[i] != NULL) in dcn20_resource_destruct()
1143 dcn20_dpp_destroy(&pool->base.dpps[i]); in dcn20_resource_destruct()
1529 next_odm_pipe->plane_res.dpp = pool->dpps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1530 next_odm_pipe->plane_res.mpcc_inst = pool->dpps[next_odm_pipe->pipe_idx]->inst; in dcn20_split_stream_for_odm()
1585 secondary_pipe->plane_res.dpp = pool->dpps[secondary_pipe->pipe_idx]; in dcn20_split_stream_for_mpc()
1586 secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst; in dcn20_split_stream_for_mpc()
2201 sec_dpp_pipe->plane_res.dpp = pool->dpps[sec_dpp_pipe->pipe_idx]; in dcn20_acquire_free_pipe_for_layer()
2202 sec_dpp_pipe->plane_res.mpcc_inst = pool->dpps[sec_dpp_pipe->pipe_idx]->inst; in dcn20_acquire_free_pipe_for_layer()
2667 pool->base.dpps[i] = dcn20_dpp_create(ctx, i); in dcn20_resource_construct()
2668 if (pool->base.dpps[i] == NULL) { in dcn20_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ ! |
| H A D | dcn303_resource.c | 1003 if (pool->dpps[i] != NULL) { in dcn303_resource_destruct()
1004 kfree(TO_DCN20_DPP(pool->dpps[i])); in dcn303_resource_destruct()
1005 pool->dpps[i] = NULL; in dcn303_resource_destruct()
1357 pool->dpps[i] = dcn303_dpp_create(ctx, i); in dcn303_resource_construct()
1358 if (pool->dpps[i] == NULL) { in dcn303_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ ! |
| H A D | dcn302_resource.c | 1059 if (pool->dpps[i] != NULL) { in dcn302_resource_destruct()
1060 kfree(TO_DCN20_DPP(pool->dpps[i])); in dcn302_resource_destruct()
1061 pool->dpps[i] = NULL; in dcn302_resource_destruct()
1425 pool->dpps[i] = dcn302_dpp_create(ctx, i); in dcn302_resource_construct()
1426 if (pool->dpps[i] == NULL) { in dcn302_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ ! |
| H A D | dcn32_resource.c | 1436 if (pool->base.dpps[i] != NULL) in dcn32_resource_destruct()
1437 dcn32_dpp_destroy(&pool->base.dpps[i]); in dcn32_resource_destruct()
2438 pool->base.dpps[j] = dcn32_dpp_create(ctx, i); in dcn32_resource_construct()
2439 if (pool->base.dpps[j] == NULL) { in dcn32_resource_construct()
2809 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
2810 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
2868 free_pipe->plane_res.dpp = pool->dpps[free_pipe->pipe_idx]; in dcn32_acquire_free_pipe_as_secondary_dpp_pipe()
2870 pool->dpps[free_pipe->pipe_idx]->inst; in dcn32_acquire_free_pipe_as_secondary_dpp_pipe()
2901 free_pipe->plane_res.dpp = pool->dpps[free_pipe_idx]; in dcn32_acquire_free_pipe_as_secondary_opp_head()
2902 free_pipe->plane_res.mpcc_inst = pool->dpps[free_pipe_idx]->inst; in dcn32_acquire_free_pipe_as_secondary_opp_head()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ ! |
| H A D | dcn21_resource.c | 707 if (pool->base.dpps[i] != NULL) in dcn21_resource_destruct()
708 dcn20_dpp_destroy(&pool->base.dpps[i]); in dcn21_resource_destruct()
1621 pool->base.dpps[j] = dcn21_dpp_create(ctx, i); in dcn21_resource_construct()
1622 if (pool->base.dpps[j] == NULL) { in dcn21_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ ! |
| H A D | dcn201_hwseq.c | 291 struct dpp *dpp = res_pool->dpps[i]; in dcn201_init_hw()
311 struct dpp *dpp = res_pool->dpps[i]; in dcn201_init_hw()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ ! |
| H A D | dcn30_resource.c | 1133 if (pool->base.dpps[i] != NULL) in dcn30_resource_destruct()
1134 dcn30_dpp_destroy(&pool->base.dpps[i]); in dcn30_resource_destruct()
1570 sec_pipe->plane_res.dpp = pool->dpps[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1571 sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in dcn30_split_stream_for_mpc_or_odm()
2519 pool->base.dpps[i] = dcn30_dpp_create(ctx, i); in dcn30_resource_construct()
2520 if (pool->base.dpps[i] == NULL) { in dcn30_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ ! |
| H A D | dcn301_resource.c | 1104 if (pool->base.dpps[i] != NULL) in dcn301_destruct()
1105 dcn301_dpp_destroy(&pool->base.dpps[i]); in dcn301_destruct()
1647 pool->base.dpps[j] = dcn301_dpp_create(ctx, i); in dcn301_resource_construct()
1648 if (pool->base.dpps[j] == NULL) { in dcn301_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ ! |
| H A D | dc_resource.c | 2616 split_pipe->plane_res.dpp = pool->dpps[i]; in acquire_first_split_pipe()
2618 split_pipe->plane_res.mpcc_inst = pool->dpps[i]->inst; in acquire_first_split_pipe()
3790 pipe_ctx->plane_res.dpp = pool->dpps[id_src[i]]; in acquire_resource_from_hw_enabled_state()
3793 if (pool->dpps[id_src[i]]) { in acquire_resource_from_hw_enabled_state()
3794 pipe_ctx->plane_res.mpcc_inst = pool->dpps[id_src[i]]->inst; in acquire_resource_from_hw_enabled_state()
3935 pipe_ctx->plane_res.dpp = pool->dpps[pipe_idx]; in acquire_otg_master_pipe_for_stream()
3937 if (pool->dpps[pipe_idx]) in acquire_otg_master_pipe_for_stream()
3938 pipe_ctx->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in acquire_otg_master_pipe_for_stream()
5559 sec_pipe->plane_res.dpp = pool->dpps[pipe_idx]; in dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy()
5560 sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ ! |
| H A D | dcn314_resource.c | 1491 if (pool->base.dpps[i] != NULL) in dcn314_resource_destruct()
1492 dcn31_dpp_destroy(&pool->base.dpps[i]); in dcn314_resource_destruct()
2040 pool->base.dpps[i] = dcn31_dpp_create(ctx, i); in dcn314_resource_construct()
2041 if (pool->base.dpps[i] == NULL) { in dcn314_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ ! |
| H A D | dcn316_resource.c | 1428 if (pool->base.dpps[i] != NULL) in dcn316_resource_destruct()
1429 dcn31_dpp_destroy(&pool->base.dpps[i]); in dcn316_resource_destruct()
1940 pool->base.dpps[i] = dcn31_dpp_create(ctx, i); in dcn316_resource_construct()
1941 if (pool->base.dpps[i] == NULL) { in dcn316_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ ! |
| H A D | dcn351_resource.c | 1480 if (pool->base.dpps[i] != NULL) in dcn351_resource_destruct()
1481 dcn35_dpp_destroy(&pool->base.dpps[i]); in dcn351_resource_destruct()
2061 pool->base.dpps[i] = dcn35_dpp_create(ctx, i); in dcn351_resource_construct()
2062 if (pool->base.dpps[i] == NULL) { in dcn351_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ ! |
| H A D | dcn31_resource.c | 1432 if (pool->base.dpps[i] != NULL) in dcn31_resource_destruct()
1433 dcn31_dpp_destroy(&pool->base.dpps[i]); in dcn31_resource_destruct()
2116 pool->base.dpps[i] = dcn31_dpp_create(ctx, i); in dcn31_resource_construct()
2117 if (pool->base.dpps[i] == NULL) { in dcn31_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ ! |
| H A D | dcn321_resource.c | 1417 if (pool->base.dpps[i] != NULL) in dcn321_resource_destruct()
1418 dcn321_dpp_destroy(&pool->base.dpps[i]); in dcn321_resource_destruct()
1935 pool->base.dpps[j] = dcn321_dpp_create(ctx, i); in dcn321_resource_construct()
1936 if (pool->base.dpps[j] == NULL) { in dcn321_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ ! |
| H A D | dcn36_resource.c | 1487 if (pool->base.dpps[i] != NULL) in dcn36_resource_destruct()
1488 dcn35_dpp_destroy(&pool->base.dpps[i]); in dcn36_resource_destruct()
2068 pool->base.dpps[i] = dcn35_dpp_create(ctx, i); in dcn36_resource_construct()
2069 if (pool->base.dpps[i] == NULL) { in dcn36_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ ! |
| H A D | dcn35_resource.c | 1500 if (pool->base.dpps[i] != NULL) in dcn35_resource_destruct()
1501 dcn35_dpp_destroy(&pool->base.dpps[i]); in dcn35_resource_destruct()
2089 pool->base.dpps[i] = dcn35_dpp_create(ctx, i); in dcn35_resource_construct()
2090 if (pool->base.dpps[i] == NULL) { in dcn35_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ ! |
| H A D | dcn315_resource.c | 1433 if (pool->base.dpps[i] != NULL) in dcn315_resource_destruct()
1434 dcn31_dpp_destroy(&pool->base.dpps[i]); in dcn315_resource_destruct()
2065 pool->base.dpps[i] = dcn31_dpp_create(ctx, i); in dcn315_resource_construct()
2066 if (pool->base.dpps[i] == NULL) { in dcn315_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/inc/ ! |
| H A D | core_types.h | 249 struct dpp *dpps[MAX_PIPES]; member
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ ! |
| H A D | dcn401_resource.c | 1442 if (pool->base.dpps[i] != NULL) in dcn401_resource_destruct()
1443 dcn401_dpp_destroy(&pool->base.dpps[i]); in dcn401_resource_destruct()
2133 pool->base.dpps[j] = dcn401_dpp_create(ctx, i); in dcn401_resource_construct()
2134 if (pool->base.dpps[j] == NULL) { in dcn401_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ ! |
| H A D | dcn30_hwseq.c | 91 struct dpp *dpp = pool->dpps[i]; in dcn30_log_color_state()
1250 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn30_get_underflow_debug_data()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ ! |
| H A D | dcn10_hw_sequencer_debug.c | 343 struct dpp *dpp = pool->dpps[i]; in dcn10_get_cm_states()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ ! |
| H A D | rn_clk_mgr.c | 119 dpp_inst = clk_mgr->base.ctx->dc->res_pool->dpps[i]->inst; in rn_update_clocks_update_dpp_dto()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ ! |
| H A D | dcn20_hwseq.c | 90 struct dpp *dpp = pool->dpps[i]; in dcn20_log_color_state()
605 struct dpp *dpp5 = hws->ctx->dc->res_pool->dpps[dpp_inst]; in dcn20_dpp_pg_control()
3167 struct dpp *dpp = res_pool->dpps[i]; in dcn20_fpga_init_hw()
3187 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn20_fpga_init_hw()
|