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Searched refs:des0 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/net/ethernet/stmicro/stmmac/
H A Denh_desc.c18 u32 tdes0 = le32_to_cpu(p->des0); in enh_desc_get_tx_status()
120 u32 rdes0 = le32_to_cpu(p->basic.des0); in enh_desc_get_ext_status()
184 u32 rdes0 = le32_to_cpu(p->des0); in enh_desc_get_rx_status()
257 p->des0 |= cpu_to_le32(RDES0_OWN); in enh_desc_init_rx_desc()
273 p->des0 &= cpu_to_le32(~ETDES0_OWN); in enh_desc_init_tx_desc()
282 return (le32_to_cpu(p->des0) & ETDES0_OWN) >> 31; in enh_desc_get_tx_owner()
287 p->des0 |= cpu_to_le32(ETDES0_OWN); in enh_desc_set_tx_owner()
292 p->des0 |= cpu_to_le32(RDES0_OWN); in enh_desc_set_rx_owner()
297 return (le32_to_cpu(p->des0) & ETDES0_LAST_SEGMENT) >> 29; in enh_desc_get_tx_ls()
302 int ter = (le32_to_cpu(p->des0) & ETDES0_END_RING) >> 21; in enh_desc_release_tx_desc()
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H A Dnorm_desc.c18 u32 tdes0 = le32_to_cpu(p->des0); in ndesc_get_tx_status()
70 u32 rdes0 = le32_to_cpu(p->des0); in ndesc_get_rx_status()
121 p->des0 |= cpu_to_le32(RDES0_OWN); in ndesc_init_rx_desc()
137 p->des0 &= cpu_to_le32(~TDES0_OWN); in ndesc_init_tx_desc()
146 return (le32_to_cpu(p->des0) & TDES0_OWN) >> 31; in ndesc_get_tx_owner()
151 p->des0 |= cpu_to_le32(TDES0_OWN); in ndesc_set_tx_owner()
156 p->des0 |= cpu_to_le32(RDES0_OWN); in ndesc_set_rx_owner()
200 p->des0 |= cpu_to_le32(TDES0_OWN); in ndesc_prepare_tx_desc()
221 return FIELD_GET(RDES0_FRAME_LEN_MASK, le32_to_cpu(p->des0)) - csum; in ndesc_get_rx_frame_len()
231 return (le32_to_cpu(p->des0) & TDES0_TIME_STAMP_STATUS) >> 17; in ndesc_get_tx_timestamp_status()
H A Ddwxgmac2_descs.c75 return le32_to_cpu(p->des0) & XGMAC_RDES0_VLAN_TAG_MASK; in dwxgmac2_wrback_get_rx_vlan_tci()
109 ns += le32_to_cpu(p->des0); in dwxgmac2_get_timestamp()
126 if ((p->des0 == 0xffffffff) && (p->des1 == 0xffffffff)) in dwxgmac2_rx_check_timestamp()
155 p->des0 = 0; in dwxgmac2_init_tx_desc()
239 p->des0 = 0; in dwxgmac2_release_tx_desc()
252 p->des0 = 0; in dwxgmac2_set_mss()
260 p->des0 = cpu_to_le32(lower_32_bits(addr)); in dwxgmac2_set_addr()
266 p->des0 = 0; in dwxgmac2_clear()
320 p->des0 = 0; in dwxgmac2_set_vlan_tag()
H A Ddwmac4_descs.c207 return (le32_to_cpu(p->des0) & RDES0_VLAN_TAG_MASK); in dwmac4_wrback_get_rx_vlan_tci()
244 ns = le32_to_cpu(p->des0); in dwmac4_get_timestamp()
254 u32 rdes0 = le32_to_cpu(p->des0); in dwmac4_rx_check_timestamp()
315 p->des0 = 0; in dwmac4_rd_init_tx_desc()
402 p->des0 = 0; in dwmac4_release_tx_desc()
428 le32_to_cpu(p->des0), le32_to_cpu(p->des1), in dwmac4_display_ring()
439 le32_to_cpu(extp->basic.des0), le32_to_cpu(extp->basic.des1), in dwmac4_display_ring()
454 le32_to_cpu(ep->basic.des0), le32_to_cpu(ep->basic.des1), in dwmac4_display_ring()
465 p->des0 = 0; in dwmac4_set_mss_ctxt()
473 p->des0 = cpu_to_le32(lower_32_bits(addr)); in dwmac4_set_addr()
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H A Ddescs_com.h36 p->des0 |= cpu_to_le32(ETDES0_END_RING); in enh_desc_end_tx_desc_on_ring()
38 p->des0 &= cpu_to_le32(~ETDES0_END_RING); in enh_desc_end_tx_desc_on_ring()
106 p->des0 |= cpu_to_le32(ETDES0_SECOND_ADDRESS_CHAINED); in enh_desc_end_tx_desc_on_chain()
H A Ddescs.h152 __le32 des0; member
H A Dstmmac_main.c6444 le32_to_cpu(p->des0), le32_to_cpu(p->des1), in sysfs_display_ring()
/linux/drivers/mmc/host/
H A Ddw_mmc.c65 u32 des0; /* Control Descriptor */ member
86 __le32 des0; /* Control Descriptor */ member
521 p->des0 = 0; in dw_mci_idmac_init()
530 p->des0 = IDMAC_DES0_ER; in dw_mci_idmac_init()
544 p->des0 = 0; in dw_mci_idmac_init()
550 p->des0 = cpu_to_le32(IDMAC_DES0_ER); in dw_mci_idmac_init()
606 if (readl_poll_timeout_atomic(&desc->des0, val, in dw_mci_prepare_desc64()
615 desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | in dw_mci_prepare_desc64()
634 desc_first->des0 |= IDMAC_DES0_FD; in dw_mci_prepare_desc64()
637 desc_last->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); in dw_mci_prepare_desc64()
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