| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| H A D | dcn201_resource.c | 551 static const struct dccg_registers dccg_regs = { variable
1223 pool->base.dccg = dccg201_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn201_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 502 static struct dccg_registers dccg_regs; variable
1845 #define REG_STRUCT dccg_regs in dcn351_resource_construct()
2011 pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn351_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 508 static struct dccg_registers dccg_regs; variable
1700 #define REG_STRUCT dccg_regs in dcn321_resource_construct()
1886 pool->base.dccg = dccg32_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn321_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 509 static struct dccg_registers dccg_regs; variable
1851 #define REG_STRUCT dccg_regs in dcn36_resource_construct()
2018 pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn36_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 522 static struct dccg_registers dccg_regs; variable
1872 #define REG_STRUCT dccg_regs in dcn35_resource_construct()
2039 pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn35_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| H A D | dcn303_resource.c | 1147 static const struct dccg_registers dccg_regs = { variable
1313 pool->dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn303_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| H A D | dcn302_resource.c | 1203 static const struct dccg_registers dccg_regs = { variable
1381 pool->dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn302_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 225 static const struct dccg_registers dccg_regs = { variable
1537 pool->base.dccg = dccg21_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn21_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 488 static struct dccg_registers dccg_regs; variable
1885 #define REG_STRUCT dccg_regs in dcn401_resource_construct()
2087 pool->base.dccg = dccg401_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn401_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 586 static const struct dccg_registers dccg_regs = { variable
1582 pool->base.dccg = dccg301_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn301_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 512 static struct dccg_registers dccg_regs; variable
2197 #define REG_STRUCT dccg_regs in dcn32_resource_construct()
2387 pool->base.dccg = dccg32_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn32_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 667 static const struct dccg_registers dccg_regs = { variable
2002 pool->base.dccg = dccg314_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn314_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 654 static const struct dccg_registers dccg_regs = { variable
1901 pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn316_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 660 static const struct dccg_registers dccg_regs = { variable
2077 pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn31_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 659 static const struct dccg_registers dccg_regs = { variable
2026 pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn315_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 615 static const struct dccg_registers dccg_regs = { variable
2466 pool->base.dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn30_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 671 static const struct dccg_registers dccg_regs = { variable
2563 pool->base.dccg = dccg2_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn20_resource_construct()
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