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Searched refs:cpuc (Results 1 – 25 of 28) sorted by relevance

12

/linux/arch/alpha/kernel/
H A Dperf_event.c391 static void maybe_change_configuration(struct cpu_hw_events *cpuc) in maybe_change_configuration() argument
395 if (cpuc->n_added == 0) in maybe_change_configuration()
399 for (j = 0; j < cpuc->n_events; j++) { in maybe_change_configuration()
400 struct perf_event *pe = cpuc->event[j]; in maybe_change_configuration()
402 if (cpuc->current_idx[j] != PMC_NO_INDEX && in maybe_change_configuration()
403 cpuc->current_idx[j] != pe->hw.idx) { in maybe_change_configuration()
404 alpha_perf_event_update(pe, &pe->hw, cpuc->current_idx[j], 0); in maybe_change_configuration()
405 cpuc->current_idx[j] = PMC_NO_INDEX; in maybe_change_configuration()
410 cpuc->idx_mask = 0; in maybe_change_configuration()
411 for (j = 0; j < cpuc->n_events; j++) { in maybe_change_configuration()
[all …]
/linux/arch/x86/events/amd/
H A Dlbr.c100 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_pmu_lbr_filter() local
101 int br_sel = cpuc->br_sel, offset, type, i, j; in amd_pmu_lbr_filter()
111 for (i = 0; i < cpuc->lbr_stack.nr; i++) { in amd_pmu_lbr_filter()
112 from = cpuc->lbr_entries[i].from; in amd_pmu_lbr_filter()
113 to = cpuc->lbr_entries[i].to; in amd_pmu_lbr_filter()
122 cpuc->lbr_entries[i].from += offset; in amd_pmu_lbr_filter()
129 cpuc->lbr_entries[i].from = 0; /* mark invalid */ in amd_pmu_lbr_filter()
134 cpuc->lbr_entries[i].type = common_branch_type(type); in amd_pmu_lbr_filter()
141 for (i = 0; i < cpuc->lbr_stack.nr; ) { in amd_pmu_lbr_filter()
142 if (!cpuc->lbr_entries[i].from) { in amd_pmu_lbr_filter()
[all …]
H A Dcore.c395 static inline int amd_has_nb(struct cpu_hw_events *cpuc) in amd_has_nb() argument
397 struct amd_nb *nb = cpuc->amd_nb; in amd_has_nb()
423 static void __amd_put_nb_event_constraints(struct cpu_hw_events *cpuc, in __amd_put_nb_event_constraints() argument
426 struct amd_nb *nb = cpuc->amd_nb; in __amd_put_nb_event_constraints()
482 __amd_get_nb_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event, in __amd_get_nb_event_constraints() argument
486 struct amd_nb *nb = cpuc->amd_nb; in __amd_get_nb_event_constraints()
493 if (cpuc->is_fake) in __amd_get_nb_event_constraints()
580 struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu); in amd_pmu_cpu_prepare() local
582 cpuc->lbr_sel = kzalloc_node(sizeof(struct er_account), GFP_KERNEL, in amd_pmu_cpu_prepare()
584 if (!cpuc->lbr_sel) in amd_pmu_cpu_prepare()
[all …]
H A Dbrs.c205 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_brs_enable() local
209 if (++cpuc->brs_active > 1) in amd_brs_enable()
221 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_brs_enable_all() local
222 if (cpuc->lbr_users) in amd_brs_enable_all()
228 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_brs_disable() local
232 if (!cpuc->brs_active) in amd_brs_disable()
236 if (--cpuc->brs_active) in amd_brs_disable()
257 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_brs_disable_all() local
258 if (cpuc->lbr_users) in amd_brs_disable_all()
283 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_brs_drain() local
[all …]
/linux/arch/x86/events/intel/
H A Dlbr.c107 static void intel_pmu_lbr_filter(struct cpu_hw_events *cpuc);
124 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in __intel_pmu_lbr_enable() local
138 if (cpuc->lbr_sel) in __intel_pmu_lbr_enable()
139 lbr_select = cpuc->lbr_sel->config & x86_pmu.lbr_sel_mask; in __intel_pmu_lbr_enable()
140 if (!static_cpu_has(X86_FEATURE_ARCH_LBR) && !pmi && cpuc->lbr_sel) in __intel_pmu_lbr_enable()
193 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in intel_pmu_lbr_reset() local
200 cpuc->last_task_ctx = NULL; in intel_pmu_lbr_reset()
201 cpuc->last_log_id = 0; in intel_pmu_lbr_reset()
202 if (!static_cpu_has(X86_FEATURE_ARCH_LBR) && cpuc->lbr_select) in intel_pmu_lbr_reset()
363 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in intel_pmu_lbr_restore() local
[all …]
H A Dds.c1079 struct cpu_hw_events *cpuc = per_cpu_ptr(&cpu_hw_events, cpu); in init_arch_pebs_on_cpu() local
1085 if (!cpuc->pebs_vaddr) { in init_arch_pebs_on_cpu()
1097 arch_pebs_base = virt_to_phys(cpuc->pebs_vaddr) | PEBS_BUFFER_SHIFT; in init_arch_pebs_on_cpu()
1140 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in intel_pmu_disable_bts() local
1143 if (!cpuc->ds) in intel_pmu_disable_bts()
1157 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in intel_pmu_drain_bts_buffer() local
1158 struct debug_store *ds = cpuc->ds; in intel_pmu_drain_bts_buffer()
1164 struct perf_event *event = cpuc->events[INTEL_PMC_IDX_FIXED_BTS]; in intel_pmu_drain_bts_buffer()
1584 static inline bool pebs_needs_sched_cb(struct cpu_hw_events *cpuc) in pebs_needs_sched_cb() argument
1586 if (cpuc->n_pebs == cpuc->n_pebs_via_pt) in pebs_needs_sched_cb()
[all …]
H A Dcore.c2510 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in __intel_pmu_disable_all() local
2514 if (bts && test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) in __intel_pmu_disable_all()
2527 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in __intel_pmu_enable_all() local
2528 u64 intel_ctrl = hybrid(cpuc->pmu, intel_ctrl); in __intel_pmu_enable_all()
2532 if (cpuc->fixed_ctrl_val != cpuc->active_fixed_ctrl_val) { in __intel_pmu_enable_all()
2533 wrmsrq(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, cpuc->fixed_ctrl_val); in __intel_pmu_enable_all()
2534 cpuc->active_fixed_ctrl_val = cpuc->fixed_ctrl_val; in __intel_pmu_enable_all()
2538 intel_ctrl & ~cpuc->intel_ctrl_guest_mask); in __intel_pmu_enable_all()
2540 if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) { in __intel_pmu_enable_all()
2542 cpuc->events[INTEL_PMC_IDX_FIXED_BTS]; in __intel_pmu_enable_all()
[all …]
H A Dbts.c263 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in bts_event_start() local
274 bts->ds_back.bts_buffer_base = cpuc->ds->bts_buffer_base; in bts_event_start()
275 bts->ds_back.bts_absolute_maximum = cpuc->ds->bts_absolute_maximum; in bts_event_start()
276 bts->ds_back.bts_interrupt_threshold = cpuc->ds->bts_interrupt_threshold; in bts_event_start()
308 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in bts_event_stop() local
333 cpuc->ds->bts_index = bts->ds_back.bts_buffer_base; in bts_event_stop()
334 cpuc->ds->bts_buffer_base = bts->ds_back.bts_buffer_base; in bts_event_stop()
335 cpuc->ds->bts_absolute_maximum = bts->ds_back.bts_absolute_maximum; in bts_event_stop()
336 cpuc->ds->bts_interrupt_threshold = bts->ds_back.bts_interrupt_threshold; in bts_event_stop()
538 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in bts_event_add() local
[all …]
H A Dknc.c217 struct cpu_hw_events *cpuc; in knc_pmu_handle_irq() local
222 cpuc = this_cpu_ptr(&cpu_hw_events); in knc_pmu_handle_irq()
244 struct perf_event *event = cpuc->events[bit]; in knc_pmu_handle_irq()
249 if (!test_bit(bit, cpuc->active_mask)) in knc_pmu_handle_irq()
270 if (cpuc->enabled) in knc_pmu_handle_irq()
H A Dp4.c921 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in p4_pmu_disable_all() local
925 struct perf_event *event = cpuc->events[idx]; in p4_pmu_disable_all()
926 if (!test_bit(idx, cpuc->active_mask)) in p4_pmu_disable_all()
1000 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in p4_pmu_enable_all() local
1004 struct perf_event *event = cpuc->events[idx]; in p4_pmu_enable_all()
1005 if (!test_bit(idx, cpuc->active_mask)) in p4_pmu_enable_all()
1037 struct cpu_hw_events *cpuc; in p4_pmu_handle_irq() local
1043 cpuc = this_cpu_ptr(&cpu_hw_events); in p4_pmu_handle_irq()
1048 if (!test_bit(idx, cpuc->active_mask)) { in p4_pmu_handle_irq()
1055 event = cpuc->events[idx]; in p4_pmu_handle_irq()
[all …]
/linux/arch/x86/events/
H A Dcore.c707 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in x86_pmu_disable_all() local
711 struct hw_perf_event *hwc = &cpuc->events[idx]->hw; in x86_pmu_disable_all()
714 if (!test_bit(idx, cpuc->active_mask)) in x86_pmu_disable_all()
747 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in x86_pmu_disable() local
752 if (!cpuc->enabled) in x86_pmu_disable()
755 cpuc->n_added = 0; in x86_pmu_disable()
756 cpuc->enabled = 0; in x86_pmu_disable()
764 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in x86_pmu_enable_all() local
768 struct hw_perf_event *hwc = &cpuc->events[idx]->hw; in x86_pmu_enable_all()
770 if (!test_bit(idx, cpuc->active_mask)) in x86_pmu_enable_all()
[all …]
H A Dperf_event.h839 int (*schedule_events)(struct cpu_hw_events *cpuc, int n, int *assign);
879 (*get_event_constraints)(struct cpu_hw_events *cpuc,
883 void (*put_event_constraints)(struct cpu_hw_events *cpuc,
886 void (*start_scheduling)(struct cpu_hw_events *cpuc);
888 void (*commit_scheduling)(struct cpu_hw_events *cpuc, int idx, int cntr);
890 void (*stop_scheduling)(struct cpu_hw_events *cpuc);
997 void (*lbr_read)(struct cpu_hw_events *cpuc);
1290 int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign);
1501 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_pmu_brs_add() local
1504 cpuc->lbr_users++; in amd_pmu_brs_add()
[all …]
/linux/arch/sparc/kernel/
H A Dperf_event.c827 static inline void sparc_pmu_enable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, in… in sparc_pmu_enable_event() argument
835 enc = perf_event_get_enc(cpuc->events[idx]); in sparc_pmu_enable_event()
837 val = cpuc->pcr[pcr_index]; in sparc_pmu_enable_event()
840 cpuc->pcr[pcr_index] = val; in sparc_pmu_enable_event()
842 pcr_ops->write_pcr(pcr_index, cpuc->pcr[pcr_index]); in sparc_pmu_enable_event()
845 static inline void sparc_pmu_disable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, i… in sparc_pmu_disable_event() argument
855 val = cpuc->pcr[pcr_index]; in sparc_pmu_disable_event()
858 cpuc->pcr[pcr_index] = val; in sparc_pmu_disable_event()
860 pcr_ops->write_pcr(pcr_index, cpuc->pcr[pcr_index]); in sparc_pmu_disable_event()
923 static void read_in_all_counters(struct cpu_hw_events *cpuc) in read_in_all_counters() argument
[all …]
/linux/tools/sched_ext/
H A Dscx_qmap.bpf.c369 struct cpu_ctx *cpuc; in BPF_STRUCT_OPS() local
395 if (!(cpuc = bpf_map_lookup_elem(&cpu_ctx_stor, &zero))) { in BPF_STRUCT_OPS()
402 if (!cpuc->dsp_cnt) { in BPF_STRUCT_OPS()
403 cpuc->dsp_idx = (cpuc->dsp_idx + 1) % 5; in BPF_STRUCT_OPS()
404 cpuc->dsp_cnt = 1 << cpuc->dsp_idx; in BPF_STRUCT_OPS()
407 fifo = bpf_map_lookup_elem(&queue_arr, &cpuc->dsp_idx); in BPF_STRUCT_OPS()
409 scx_bpf_error("failed to find ring %llu", cpuc->dsp_idx); in BPF_STRUCT_OPS()
439 cpuc->dsp_cnt--; in BPF_STRUCT_OPS()
446 if (!cpuc->dsp_cnt) in BPF_STRUCT_OPS()
450 cpuc->dsp_cnt = 0; in BPF_STRUCT_OPS()
[all …]
H A Dscx_flatcg.bpf.c152 struct fcg_cpu_ctx *cpuc; in find_cpu_ctx() local
155 cpuc = bpf_map_lookup_elem(&cpu_ctx, &idx); in find_cpu_ctx()
156 if (!cpuc) { in find_cpu_ctx()
160 return cpuc; in find_cpu_ctx()
729 struct fcg_cpu_ctx *cpuc; in BPF_STRUCT_OPS() local
735 cpuc = find_cpu_ctx(); in BPF_STRUCT_OPS()
736 if (!cpuc) in BPF_STRUCT_OPS()
739 if (!cpuc->cur_cgid) in BPF_STRUCT_OPS()
742 if (time_before(now, cpuc->cur_at + cgrp_slice_ns)) { in BPF_STRUCT_OPS()
743 if (scx_bpf_dsq_move_to_local(cpuc->cur_cgid)) { in BPF_STRUCT_OPS()
[all …]
/linux/arch/loongarch/kernel/
H A Dperf_event.c253 static int loongarch_pmu_alloc_counter(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc) in loongarch_pmu_alloc_counter() argument
258 if (!test_and_set_bit(i, cpuc->used_mask)) in loongarch_pmu_alloc_counter()
269 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in loongarch_pmu_enable_event() local
274 cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base) | in loongarch_pmu_enable_event()
288 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in loongarch_pmu_disable_event() local
293 cpuc->saved_ctrl[idx] = loongarch_pmu_read_control(idx) & in loongarch_pmu_disable_event()
295 loongarch_pmu_write_control(idx, cpuc->saved_ctrl[idx]); in loongarch_pmu_disable_event()
388 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in loongarch_pmu_add() local
394 idx = loongarch_pmu_alloc_counter(cpuc, hwc); in loongarch_pmu_add()
406 cpuc->events[idx] = event; in loongarch_pmu_add()
[all …]
/linux/arch/sh/kernel/
H A Dperf_event.c201 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in sh_pmu_stop() local
207 cpuc->events[idx] = NULL; in sh_pmu_stop()
219 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in sh_pmu_start() local
229 cpuc->events[idx] = event; in sh_pmu_start()
236 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in sh_pmu_del() local
239 __clear_bit(event->hw.idx, cpuc->used_mask); in sh_pmu_del()
246 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in sh_pmu_add() local
253 if (__test_and_set_bit(idx, cpuc->used_mask)) { in sh_pmu_add()
254 idx = find_first_zero_bit(cpuc->used_mask, sh_pmu->num_events); in sh_pmu_add()
258 __set_bit(idx, cpuc->used_mask); in sh_pmu_add()
/linux/drivers/perf/
H A Darm_xscale_pmu.c149 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in xscale1pmu_handle_irq() local
174 struct perf_event *event = cpuc->events[idx]; in xscale1pmu_handle_irq()
266 xscale1pmu_get_event_idx(struct pmu_hw_events *cpuc, in xscale1pmu_get_event_idx() argument
271 if (test_and_set_bit(XSCALE_CYCLE_COUNTER, cpuc->used_mask)) in xscale1pmu_get_event_idx()
276 if (!test_and_set_bit(XSCALE_COUNTER1, cpuc->used_mask)) in xscale1pmu_get_event_idx()
279 if (!test_and_set_bit(XSCALE_COUNTER0, cpuc->used_mask)) in xscale1pmu_get_event_idx()
286 static void xscalepmu_clear_event_idx(struct pmu_hw_events *cpuc, in xscalepmu_clear_event_idx() argument
289 clear_bit(event->hw.idx, cpuc->used_mask); in xscalepmu_clear_event_idx()
487 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in xscale2pmu_handle_irq() local
506 struct perf_event *event = cpuc->events[idx]; in xscale2pmu_handle_irq()
[all …]
H A Driscv_pmu.c260 struct cpu_hw_events *cpuc = this_cpu_ptr(rvpmu->hw_events); in riscv_pmu_add() local
269 cpuc->events[idx] = event; in riscv_pmu_add()
270 cpuc->n_events++; in riscv_pmu_add()
284 struct cpu_hw_events *cpuc = this_cpu_ptr(rvpmu->hw_events); in riscv_pmu_del() local
288 cpuc->events[hwc->idx] = NULL; in riscv_pmu_del()
292 cpuc->n_events--; in riscv_pmu_del()
390 struct cpu_hw_events *cpuc; in riscv_pmu_alloc() local
403 cpuc = per_cpu_ptr(pmu->hw_events, cpuid); in riscv_pmu_alloc()
404 cpuc->n_events = 0; in riscv_pmu_alloc()
406 cpuc->events[i] = NULL; in riscv_pmu_alloc()
[all …]
H A Darm_v6_pmu.c242 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in armv6pmu_handle_irq() local
259 struct perf_event *event = cpuc->events[idx]; in armv6pmu_handle_irq()
313 armv6pmu_get_event_idx(struct pmu_hw_events *cpuc, in armv6pmu_get_event_idx() argument
319 if (test_and_set_bit(ARMV6_CYCLE_COUNTER, cpuc->used_mask)) in armv6pmu_get_event_idx()
328 if (!test_and_set_bit(ARMV6_COUNTER1, cpuc->used_mask)) in armv6pmu_get_event_idx()
331 if (!test_and_set_bit(ARMV6_COUNTER0, cpuc->used_mask)) in armv6pmu_get_event_idx()
339 static void armv6pmu_clear_event_idx(struct pmu_hw_events *cpuc, in armv6pmu_clear_event_idx() argument
342 clear_bit(event->hw.idx, cpuc->used_mask); in armv6pmu_clear_event_idx()
H A Darm_pmuv3.c798 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in armv8pmu_enable_user_access() local
802 for_each_set_bit(i, cpuc->used_mask, ARMPMU_MAX_HWEVENTS) { in armv8pmu_enable_user_access()
803 if (armv8pmu_event_has_user_read(cpuc->events[i])) in armv8pmu_enable_user_access()
809 for_each_andnot_bit(i, cpu_pmu->cntr_mask, cpuc->used_mask, in armv8pmu_enable_user_access()
871 static void read_branch_records(struct pmu_hw_events *cpuc, in read_branch_records() argument
875 struct perf_branch_stack *branch_stack = cpuc->branch_stack; in read_branch_records()
885 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in armv8pmu_handle_irq() local
911 struct perf_event *event = cpuc->events[idx]; in armv8pmu_handle_irq()
932 read_branch_records(cpuc, event, &data); in armv8pmu_handle_irq()
946 static int armv8pmu_get_single_idx(struct pmu_hw_events *cpuc, in armv8pmu_get_single_idx() argument
[all …]
H A Darm_v7_pmu.c892 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in armv7pmu_handle_irq() local
913 struct perf_event *event = cpuc->events[idx]; in armv7pmu_handle_irq()
960 static int armv7pmu_get_event_idx(struct pmu_hw_events *cpuc, in armv7pmu_get_event_idx() argument
970 if (test_and_set_bit(ARMV7_IDX_CYCLE_COUNTER, cpuc->used_mask)) in armv7pmu_get_event_idx()
981 if (!test_and_set_bit(idx, cpuc->used_mask)) in armv7pmu_get_event_idx()
989 static void armv7pmu_clear_event_idx(struct pmu_hw_events *cpuc, in armv7pmu_clear_event_idx() argument
992 clear_bit(event->hw.idx, cpuc->used_mask); in armv7pmu_clear_event_idx()
1515 static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc, in krait_pmu_get_event_idx() argument
1535 if (test_and_set_bit(bit, cpuc->used_mask)) in krait_pmu_get_event_idx()
1539 idx = armv7pmu_get_event_idx(cpuc, event); in krait_pmu_get_event_idx()
[all …]
H A Dapple_m1_cpu_pmu.c446 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in m1_pmu_handle_irq() local
466 struct perf_event *event = cpuc->events[idx]; in m1_pmu_handle_irq()
496 static int m1_pmu_get_event_idx(struct pmu_hw_events *cpuc, in m1_pmu_get_event_idx() argument
512 if (!test_and_set_bit(idx, cpuc->used_mask)) in m1_pmu_get_event_idx()
519 static void m1_pmu_clear_event_idx(struct pmu_hw_events *cpuc, in m1_pmu_clear_event_idx() argument
522 clear_bit(event->hw.idx, cpuc->used_mask); in m1_pmu_clear_event_idx()
/linux/arch/mips/kernel/
H A Dperf_event_mipsxx.c314 static int mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc, in mipsxx_pmu_alloc_counter() argument
341 !test_and_set_bit(i, cpuc->used_mask)) in mipsxx_pmu_alloc_counter()
351 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in mipsxx_pmu_enable_event() local
357 cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0x3ff) | in mipsxx_pmu_enable_event()
362 cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) | in mipsxx_pmu_enable_event()
369 cpuc->saved_ctrl[idx] |= in mipsxx_pmu_enable_event()
374 cpuc->saved_ctrl[idx] |= M_TC_EN_ALL; in mipsxx_pmu_enable_event()
387 cpuc->saved_ctrl[idx] |= ctrl; in mipsxx_pmu_enable_event()
397 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in mipsxx_pmu_disable_event() local
403 cpuc->saved_ctrl[idx] = mipsxx_pmu_read_control(idx) & in mipsxx_pmu_disable_event()
[all …]
/linux/arch/x86/events/zhaoxin/
H A Dcore.c358 struct cpu_hw_events *cpuc; in zhaoxin_pmu_handle_irq() local
363 cpuc = this_cpu_ptr(&cpu_hw_events); in zhaoxin_pmu_handle_irq()
388 struct perf_event *event = cpuc->events[bit]; in zhaoxin_pmu_handle_irq()
392 if (!test_bit(bit, cpuc->active_mask)) in zhaoxin_pmu_handle_irq()
422 zhaoxin_get_event_constraints(struct cpu_hw_events *cpuc, int idx, in zhaoxin_get_event_constraints() argument

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