Searched refs:component_reg_phys (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/cxl/core/ |
| H A D | port.c | 742 port->component_reg_phys = CXL_RESOURCE_NONE; in cxl_port_alloc() 754 resource_size_t component_reg_phys) in cxl_setup_comp_regs() argument 759 .resource = component_reg_phys, in cxl_setup_comp_regs() 762 if (component_reg_phys == CXL_RESOURCE_NONE) in cxl_setup_comp_regs() 772 resource_size_t component_reg_phys) in cxl_port_setup_regs() argument 777 component_reg_phys); in cxl_port_setup_regs() 782 resource_size_t component_reg_phys) in cxl_dport_setup_regs() argument 795 component_reg_phys); in cxl_dport_setup_regs() 837 resource_size_t component_reg_phys, in cxl_port_add() argument 864 port->component_reg_phys = component_reg_phys; in cxl_port_add() [all …]
|
| H A D | regs.c | 580 resource_size_t component_reg_phys; in __rcrb_to_component() local 623 component_reg_phys = bar0 & PCI_BASE_ADDRESS_MEM_MASK; in __rcrb_to_component() 625 component_reg_phys |= ((u64)bar1) << 32; in __rcrb_to_component() 627 if (!component_reg_phys) in __rcrb_to_component() 631 if (!IS_ALIGNED(component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE)) in __rcrb_to_component() 634 return component_reg_phys; in __rcrb_to_component()
|
| /linux/drivers/cxl/ |
| H A D | cxl.h | 660 resource_size_t component_reg_phys; member 800 resource_size_t component_reg_phys, 823 resource_size_t component_reg_phys); 876 resource_size_t component_reg_phys);
|
| H A D | acpi.c | 697 resource_size_t component_reg_phys; in add_host_bridge_uport() local 726 component_reg_phys = ctx.base; in add_host_bridge_uport() 727 if (component_reg_phys != CXL_RESOURCE_NONE) in add_host_bridge_uport() 729 ctx.uid, &component_reg_phys); in add_host_bridge_uport() 735 port = devm_cxl_add_port(host, bridge, component_reg_phys, dport); in add_host_bridge_uport()
|
| H A D | pci.c | 481 resource_size_t component_reg_phys; in cxl_rcrb_get_comp_regs() local 493 component_reg_phys = cxl_rcd_component_reg_phys(&pdev->dev, dport); in cxl_rcrb_get_comp_regs() 494 if (component_reg_phys == CXL_RESOURCE_NONE) in cxl_rcrb_get_comp_regs() 497 map->resource = component_reg_phys; in cxl_rcrb_get_comp_regs()
|
| H A D | port.c | 242 rc = cxl_port_setup_regs(port, port->component_reg_phys); in cxl_port_add_dport()
|