| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r9a09g077m44-rzt2h-evk.dts | 18 * SW2[1] = ON; SW2[2] = ON
22 * SW2[1] = OFF; SW2[2] = ON
28 * P17_4 = SD1_CD; SW2[3] = ON
29 * P08_5 = SD1_PWEN; SW2[3] = ON
30 * P08_6 = SD1_IOVS; SW2[3] = ON; SW5[3] = OFF; SW5[4] = ON
69 /* SW2-3: OFF */
124 /* SW2-3: OFF */
254 * SW2[6] OFF - connect MDC/MDIO of Ethernet port 2 to GMAC2
255 * SW2[7] ON - use pins P29_1-P29_7, P30_0-P30_4, and P31_2-P31_5
283 * SW2[8] ON - use pins P33_2-P33_7, P34_0-P34_5, P34_7 and
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| H A D | rzg2l-smarc.dtsi | 172 * SW2 should be at position 2->3 so that SER0_TX line is activated
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| H A D | rzg2lc-smarc.dtsi | 184 * SW2 should be at position 2->3 so that SER0_TX line is activated
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| /linux/arch/arm/boot/dts/renesas/ |
| H A D | sh73a0-kzm9g.dts | 113 label = "SW2-R";
119 label = "SW2-L";
125 label = "SW2-P";
131 label = "SW2-U";
137 label = "SW2-D";
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| H A D | r8a7792-blanche.dts | 114 label = "SW2-1";
121 label = "SW2-2";
128 label = "SW2-3";
135 label = "SW2-4";
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| H A D | r8a7794-alt.dts | 101 label = "SW2-1";
108 label = "SW2-2";
115 label = "SW2-3";
122 label = "SW2-4";
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| H A D | r8a7793-gose.dts | 76 label = "SW2-1";
83 label = "SW2-2";
90 label = "SW2-3";
97 label = "SW2-4";
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| H A D | r8a7791-koelsch.dts | 85 label = "SW2-1";
92 label = "SW2-2";
99 label = "SW2-3";
106 label = "SW2-4";
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| H A D | r8a7790-lager.dts | 84 label = "SW2-1";
91 label = "SW2-2";
98 label = "SW2-3";
105 label = "SW2-4";
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| H A D | r7s72100-rskrza1.dts | 90 label = "SW2";
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| H A D | r8a7792-wheat.dts | 55 label = "SW2";
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| H A D | r8a7742-iwg21d-q7-dbcm-ca.dts | 237 * Set SW2 switch on the SOM to 'ON'
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| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | pv88060.txt | 11 BUCK1, LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7, SW1, SW2, SW3, SW4,
90 SW2 {
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| /linux/drivers/regulator/ |
| H A D | pcap-regulator.c | 132 VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
228 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
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| H A D | pfuze100-regulator.c | 373 PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
391 PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
409 PFUZE3000_SW_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
424 PFUZE3000_SW_REG(PFUZE3001, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
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| H A D | cpcap-regulator.c | 333 CPCAP_REG(SW2, CPCAP_REG_S2C1, CPCAP_REG_ASSIGN2,
409 CPCAP_REG(SW2, CPCAP_REG_S2C1, CPCAP_REG_ASSIGN2,
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| H A D | pv88060-regulator.c | 218 PV88060_SW(PV88060, SW2, 5000000),
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| H A D | ltc3676.c | 226 LTC3676_LINEAR_REG(SW2, sw2, BUCK2, DVB2A),
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| H A D | ltc3589.c | 255 LTC3589_LINEAR_REG(SW2, sw2, B2DTV1),
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| /linux/Documentation/networking/ |
| H A D | arcnet-hardware.rst | 804 < | SW1 | | SW2 | |
832 SW2 1-6: Reserved for Future Use
1052 | | | SW2 |
1065 SW2: DIP-Switches for Memory Base and I/O Base addresses
1088 The I/O base address is coded with DIP-Switches 6,7 and 8 of SW2:
1105 DIP Switches 1-5 of SW2 encode the RAM and ROM Address Range:
1378 The eight switches in SW2 are used to set the node ID. Each node attached
1576 SW2 1-8: Node ID Select (ID0-ID7)
1589 The eight switches in SW2 are used to set the node ID. Each node attached
1834 | |SW2| |
[all …]
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| /linux/Documentation/hid/ |
| H A D | hid-alps.rst | 118 1 0 0 SW6 SW5 SW4 SW3 SW2 SW1
168 Byte1 1 1 1 0 1 SW3 SW2 SW1
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| /linux/include/linux/mfd/ |
| H A D | ezx-pcap.h | 130 #define SW2 18 macro
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx53-qsrb.dts | 50 regulator-name = "SW2";
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| /linux/arch/arm/boot/dts/microchip/ |
| H A D | at91-kizbox3-hs.dts | 79 label = "SW2";
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-tiger-haikou.dts | 321 /* DB9 RS232/RS485 when SW2 in "UART1" mode */
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