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Searched refs:SDHCI_HOST_CONTROL2 (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/mmc/host/
H A Dsdhci.c96 sdhci_readw(host, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
131 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
136 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
346 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
348 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
1440 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_auto_cmd_select()
1445 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_auto_cmd_select()
2301 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_uhs_signaling()
2318 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_uhs_signaling()
2473 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_ios()
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H A Dsdhci-xenon.c203 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
221 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
299 reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_ios()
301 sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); in xenon_set_ios()
H A Dsdhci-sprd.c342 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
374 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
559 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
562 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
H A Dsdhci-pci-gli.c416 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
418 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
436 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
438 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
482 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_execute_tuning_9750()
1005 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_gli_enable_internal_clock()
1012 sdhci_writew(host, SDHCI_CTRL_V4_MODE, SDHCI_HOST_CONTROL2); in sdhci_gli_enable_internal_clock()
1718 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
1729 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
H A Dsdhci-acpi.c553 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
555 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
557 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
559 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
H A Dsdhci-st.c261 u16 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
304 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
H A Dsdhci-pxav3.c253 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
297 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
H A Dsdhci-of-dwcmshc.c494 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
521 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
996 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in th1520_sdhci_reset()
999 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in th1520_sdhci_reset()
1510 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_eic7700_executing_tuning()
1512 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_eic7700_executing_tuning()
H A Dsdhci-brcmstb.c247 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
266 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
H A Dsdhci-of-k1.c116 spacemit_sdhci_setbits(host, SDHCI_CTRL_VDD_180, SDHCI_HOST_CONTROL2); in spacemit_sdhci_set_uhs_signaling()
H A Dsdhci-msm.c1353 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1413 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
2214 case SDHCI_HOST_CONTROL2: in __sdhci_msm_check_write()
2343 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2365 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2372 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
H A Dsdhci-pci-core.c1689 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1691 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1693 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1695 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
H A Dsdhci-uhs2.c278 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_uhs2_set_ios()
287 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in __sdhci_uhs2_set_ios()
H A Dsdhci.h226 #define SDHCI_HOST_CONTROL2 0x3E macro
H A Dsdhci-esdhc-imx.c677 if (unlikely(reg == SDHCI_HOST_CONTROL2)) { in esdhc_readw_le()
736 case SDHCI_HOST_CONTROL2: in esdhc_writew_le()
H A Dsdhci-pci-o2micro.c217 u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_o2_execute_tuning()