| /linux/drivers/mmc/host/ |
| H A D | sdhci-milbeaut.c | 92 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset() 94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset() 99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset() 105 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset() 218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init() 220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
|
| H A D | sdhci-pci-o2micro.c | 260 sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery() 277 sdhci_writeb(host, scratch_8, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery() 288 SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery() 350 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning() 352 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning() 374 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning() 376 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning() 569 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk() 574 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk() 589 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_set_clock() [all …]
|
| H A D | sdhci-s3c.c | 268 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); in sdhci_s3c_set_clock() 379 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock() 386 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock() 388 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock() 398 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock() 402 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cmu_set_clock() 414 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
|
| H A D | sdhci-of-at91.c | 76 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock() 78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock() 86 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock() 90 1000, 20000, false, host, SDHCI_CLOCK_CONTROL)) { in sdhci_at91_set_clock() 97 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
|
| H A D | sdhci-pci-gli.c | 613 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9750_set_clock() 807 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9755_set_clock() 993 10, 20000, false, host, SDHCI_CLOCK_CONTROL)) { in sdhci_wait_clock_stable() 1007 sdhci_writew(host, SDHCI_CLOCK_INT_EN, SDHCI_CLOCK_CONTROL); in sdhci_gli_enable_internal_clock() 1264 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9767_set_clock() 1445 value = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express() 1447 sdhci_writew(host, value, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express() 1479 value = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express() 1481 sdhci_writew(host, value, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express() 1879 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend() [all …]
|
| H A D | sdhci-of-ma35d1.c | 57 { SDHCI_CLOCK_CONTROL, sizeof(u32)}, 275 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in ma35_disable_card_clk() 278 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in ma35_disable_card_clk()
|
| H A D | sdhci-of-dwcmshc.c | 297 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_enable_card_clk() 300 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in dwcmshc_enable_card_clk() 1069 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in cv18xx_sdhci_set_tap() 1071 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in cv18xx_sdhci_set_tap() 1085 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in cv18xx_sdhci_set_tap() 1262 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_eic7700_set_clock() 1264 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_eic7700_set_clock() 1865 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_cqhci_init() 1867 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in dwcmshc_cqhci_init() 1868 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_cqhci_init() [all …]
|
| H A D | sdhci-sprd.c | 177 u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off() 180 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off() 187 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on() 189 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on() 235 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in _sdhci_sprd_set_clock() 295 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_sprd_set_clock()
|
| H A D | sdhci-xenon-phy.c | 228 1100, 20000, false, host, SDHCI_CLOCK_CONTROL); in xenon_check_stability_internal_clk() 639 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set() 641 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set() 663 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set() 665 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
|
| H A D | sdhci_f_sdh30.c | 77 if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) in sdhci_f_sdh30_reset() 78 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); in sdhci_f_sdh30_reset()
|
| H A D | sdhci-pci-dwc-mshc.c | 70 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_snps_set_clock()
|
| H A D | sdhci-xenon.c | 32 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk() 34 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk() 40 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
|
| H A D | sdhci-brcmstb.c | 178 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in brcmstb_sdhci_reset_cmd_data() 179 sdhci_writel(host, reg | new_mask, SDHCI_CLOCK_CONTROL); in brcmstb_sdhci_reset_cmd_data() 232 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_brcmstb_set_clock()
|
| H A D | sdhci-uhs2.c | 446 u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_uhs2_disable_clk() 449 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_uhs2_disable_clk() 457 u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_uhs2_enable_clk() 462 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_uhs2_enable_clk() 465 10, timeout_us, true, host, SDHCI_CLOCK_CONTROL)) { in sdhci_uhs2_enable_clk()
|
| H A D | sdhci-of-arasan.c | 421 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_arasan_set_clock() 426 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_arasan_set_clock() 1128 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset() 1130 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset() 1135 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
|
| H A D | sdhci.c | 73 sdhci_readw(host, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs() 1928 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_calc_clk() 2013 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk() 2020 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk() 2036 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk() 2043 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk() 2058 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk() 2068 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_set_clock() 2460 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_set_ios() 2463 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_set_ios()
|
| H A D | sdhci-esdhc-mcf.c | 274 esdhc_clrset_be(host, 0x0000fff7, temp, SDHCI_CLOCK_CONTROL); in esdhc_mcf_pltfm_set_clock()
|
| H A D | sdhci-of-aspeed.c | 249 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in aspeed_sdhci_set_clock()
|
| H A D | sdhci.h | 144 #define SDHCI_CLOCK_CONTROL 0x2C macro
|
| H A D | sdhci-tegra.c | 256 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk() 267 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
|
| H A D | sdhci-pci-core.c | 684 u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_intel_set_clock() 688 sdhci_writew(host, clk & ~SDHCI_CLOCK_CARD_EN, SDHCI_CLOCK_CONTROL); in sdhci_intel_set_clock()
|
| H A D | sdhci-msm.c | 1850 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock() 1860 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
|
| H A D | sdhci-esdhc-imx.c | 726 case SDHCI_CLOCK_CONTROL: in esdhc_writew_le()
|