| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
| H A D | dcn401_dccg.c | 230 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg401_set_dtbclk_p_src() 239 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg401_set_dtbclk_p_src() 248 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg401_set_dtbclk_p_src() 257 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg401_set_dtbclk_p_src() 280 REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL, in dccg401_set_physymclk() 287 REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL, in dccg401_set_physymclk() 297 REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL, in dccg401_set_physymclk() 304 REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL, in dccg401_set_physymclk() 314 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg401_set_physymclk() 321 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg401_set_physymclk() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
| H A D | dcn35_dccg.c | 182 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_set_symclk32_se_rcg() 187 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_set_symclk32_se_rcg() 192 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_set_symclk32_se_rcg() 197 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_set_symclk32_se_rcg() 219 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_set_symclk32_le_rcg() 224 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_set_symclk32_le_rcg() 436 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL5, in dccg35_set_dpstreamclk_rcg() 441 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL5, in dccg35_set_dpstreamclk_rcg() 446 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL5, in dccg35_set_dpstreamclk_rcg() 451 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL5, in dccg35_set_dpstreamclk_rcg() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
| H A D | dcn31_dccg.c | 125 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_dpstreamclk() 135 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_disable_dpstreamclk() 187 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_symclk32_se() 190 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_enable_symclk32_se() 196 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_symclk32_se() 199 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_enable_symclk32_se() 205 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_symclk32_se() 208 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_enable_symclk32_se() 214 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_symclk32_se() 217 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_enable_symclk32_se() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| H A D | dcn30_dio_stream_encoder.c | 82 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc3_update_hdmi_info_packet() 89 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc3_update_hdmi_info_packet() 96 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc3_update_hdmi_info_packet() 103 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc3_update_hdmi_info_packet() 110 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc3_update_hdmi_info_packet() 117 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc3_update_hdmi_info_packet() 124 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc3_update_hdmi_info_packet() 131 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc3_update_hdmi_info_packet() 138 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL6, in enc3_update_hdmi_info_packet() 145 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL6, in enc3_update_hdmi_info_packet() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn32/ |
| H A D | dcn32_dccg.c | 124 REG_UPDATE_2(OTG_PIXEL_RATE_DIV, in dccg32_set_pixel_rate_div() 129 REG_UPDATE_2(OTG_PIXEL_RATE_DIV, in dccg32_set_pixel_rate_div() 134 REG_UPDATE_2(OTG_PIXEL_RATE_DIV, in dccg32_set_pixel_rate_div() 139 REG_UPDATE_2(OTG_PIXEL_RATE_DIV, in dccg32_set_pixel_rate_div() 166 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src() 175 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src() 184 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src() 193 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src() 240 REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[params->otg_inst], in dccg32_set_dtbclk_dto() 291 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg32_set_dpstreamclk() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_opp.c | 156 REG_UPDATE_2(FMT_BIT_DEPTH_CONTROL, in dce60_set_truncation() 163 REG_UPDATE_2(FMT_BIT_DEPTH_CONTROL, in dce60_set_truncation() 168 REG_UPDATE_2(FMT_BIT_DEPTH_CONTROL, in dce60_set_truncation() 177 REG_UPDATE_2(FMT_BIT_DEPTH_CONTROL, in dce60_set_truncation() 227 REG_UPDATE_2(FMT_CONTROL, in set_spatial_dither() 231 REG_UPDATE_2(FMT_CONTROL, in set_spatial_dither() 237 REG_UPDATE_2(FMT_CONTROL, in set_spatial_dither() 311 REG_UPDATE_2(FMT_BIT_DEPTH_CONTROL, in set_temporal_dither() 481 REG_UPDATE_2(FMT_CONTROL, in set_pixel_encoding() 486 REG_UPDATE_2(FMT_CONTROL, in set_pixel_encoding() [all …]
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| H A D | dce_stream_encoder.c | 132 REG_UPDATE_2(AFMT_VBI_PACKET_CONTROL, in dce110_update_generic_info_packet() 438 REG_UPDATE_2( in dce110_stream_encoder_dp_set_stream_attribute() 576 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute() 580 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute() 587 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute() 591 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute() 597 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute() 611 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute() 623 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute() 751 REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0, in dce110_stream_encoder_update_hdmi_info_packets() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/opp/dcn10/ |
| H A D | dcn10_opp.c | 78 REG_UPDATE_2(FMT_CONTROL, in opp1_set_spatial_dither() 82 REG_UPDATE_2(FMT_CONTROL, in opp1_set_spatial_dither() 89 REG_UPDATE_2(FMT_CONTROL, in opp1_set_spatial_dither() 213 REG_UPDATE_2(FMT_CLAMP_CNTL, in opp1_set_clamping() 219 REG_UPDATE_2(FMT_CLAMP_CNTL, in opp1_set_clamping() 224 REG_UPDATE_2(FMT_CLAMP_CNTL, in opp1_set_clamping() 229 REG_UPDATE_2(FMT_CLAMP_CNTL, in opp1_set_clamping() 235 REG_UPDATE_2(FMT_CLAMP_CNTL, in opp1_set_clamping() 255 REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, in opp1_set_dyn_expansion() 270 REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, in opp1_set_dyn_expansion() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
| H A D | dcn314_dccg.c | 124 REG_UPDATE_2(OTG_PIXEL_RATE_DIV, in dccg314_set_pixel_rate_div() 129 REG_UPDATE_2(OTG_PIXEL_RATE_DIV, in dccg314_set_pixel_rate_div() 134 REG_UPDATE_2(OTG_PIXEL_RATE_DIV, in dccg314_set_pixel_rate_div() 139 REG_UPDATE_2(OTG_PIXEL_RATE_DIV, in dccg314_set_pixel_rate_div() 167 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src() 176 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src() 185 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src() 194 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src() 241 REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[params->otg_inst], in dccg314_set_dtbclk_dto() 264 REG_UPDATE_2(DPSTREAMCLK_CNTL, in dccg314_set_dpstreamclk() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn20/ |
| H A D | dcn20_stream_encoder.c | 81 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc2_update_hdmi_info_packet() 88 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc2_update_hdmi_info_packet() 95 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc2_update_hdmi_info_packet() 102 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc2_update_hdmi_info_packet() 109 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc2_update_hdmi_info_packet() 116 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc2_update_hdmi_info_packet() 123 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc2_update_hdmi_info_packet() 130 REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, in enc2_update_hdmi_info_packet() 270 REG_UPDATE_2(AFMT_VBI_PACKET_CONTROL1, in enc2_update_gsp7_128_info_packet() 287 REG_UPDATE_2(DP_DSC_CNTL, in enc2_dp_set_dsc_config() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| H A D | dcn10_optc.c | 196 REG_UPDATE_2(OTG_H_SYNC_A, in optc1_program_timing() 210 REG_UPDATE_2(OTG_H_BLANK_START_END, in optc1_program_timing() 234 REG_UPDATE_2(OTG_V_SYNC_A, in optc1_program_timing() 248 REG_UPDATE_2(OTG_V_BLANK_START_END, in optc1_program_timing() 282 REG_UPDATE_2(OTG_CONTROL, in optc1_program_timing() 383 REG_UPDATE_2(CONTROL, in optc1_set_vtg_params() 429 REG_UPDATE_2(OTG_BLANK_CONTROL, in optc1_unblank_crtc() 453 REG_UPDATE_2(OTG_BLANK_CONTROL, in optc1_blank_crtc() 487 REG_UPDATE_2(OPTC_INPUT_CLOCK_CONTROL, in optc1_enable_optc_clock() 496 REG_UPDATE_2(OTG_CLOCK_CONTROL, in optc1_enable_optc_clock() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn35/ |
| H A D | dcn35_optc.c | 127 REG_UPDATE_2(OTG_CONTROL, in optc35_enable_crtc() 177 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc35_phantom_crtc_post_enable() 292 REG_UPDATE_2(OTG_CRC0_WINDOWA_X_CONTROL, in optc35_configure_crc() 297 REG_UPDATE_2(OTG_CRC0_WINDOWA_Y_CONTROL, in optc35_configure_crc() 302 REG_UPDATE_2(OTG_CRC0_WINDOWB_X_CONTROL, in optc35_configure_crc() 307 REG_UPDATE_2(OTG_CRC0_WINDOWB_Y_CONTROL, in optc35_configure_crc() 325 REG_UPDATE_2(OTG_CRC1_WINDOWA_X_CONTROL, in optc35_configure_crc() 330 REG_UPDATE_2(OTG_CRC1_WINDOWA_Y_CONTROL, in optc35_configure_crc() 335 REG_UPDATE_2(OTG_CRC1_WINDOWB_X_CONTROL, in optc35_configure_crc() 340 REG_UPDATE_2(OTG_CRC1_WINDOWB_Y_CONTROL, in optc35_configure_crc() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| H A D | dcn32_dio_stream_encoder.c | 156 REG_UPDATE_2(HDMI_CONTROL, in enc32_stream_encoder_hdmi_set_stream_attribute() 160 REG_UPDATE_2(HDMI_CONTROL, in enc32_stream_encoder_hdmi_set_stream_attribute() 167 REG_UPDATE_2(HDMI_CONTROL, in enc32_stream_encoder_hdmi_set_stream_attribute() 171 REG_UPDATE_2(HDMI_CONTROL, in enc32_stream_encoder_hdmi_set_stream_attribute() 177 REG_UPDATE_2(HDMI_CONTROL, in enc32_stream_encoder_hdmi_set_stream_attribute() 190 REG_UPDATE_2(HDMI_CONTROL, in enc32_stream_encoder_hdmi_set_stream_attribute() 202 REG_UPDATE_2(HDMI_CONTROL, in enc32_stream_encoder_hdmi_set_stream_attribute() 288 REG_UPDATE_2(DP_VID_TIMING, in enc32_stream_encoder_dp_unblank()
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| H A D | dcn35_dio_stream_encoder.c | 144 REG_UPDATE_2(HDMI_CONTROL, in enc35_stream_encoder_hdmi_set_stream_attribute() 148 REG_UPDATE_2(HDMI_CONTROL, in enc35_stream_encoder_hdmi_set_stream_attribute() 155 REG_UPDATE_2(HDMI_CONTROL, in enc35_stream_encoder_hdmi_set_stream_attribute() 159 REG_UPDATE_2(HDMI_CONTROL, in enc35_stream_encoder_hdmi_set_stream_attribute() 165 REG_UPDATE_2(HDMI_CONTROL, in enc35_stream_encoder_hdmi_set_stream_attribute() 178 REG_UPDATE_2(HDMI_CONTROL, in enc35_stream_encoder_hdmi_set_stream_attribute() 190 REG_UPDATE_2(HDMI_CONTROL, in enc35_stream_encoder_hdmi_set_stream_attribute() 320 REG_UPDATE_2(DP_VID_TIMING, in enc35_stream_encoder_dp_unblank()
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| H A D | dcn314_dio_stream_encoder.c | 198 REG_UPDATE_2(HDMI_CONTROL, in enc314_stream_encoder_hdmi_set_stream_attribute() 202 REG_UPDATE_2(HDMI_CONTROL, in enc314_stream_encoder_hdmi_set_stream_attribute() 209 REG_UPDATE_2(HDMI_CONTROL, in enc314_stream_encoder_hdmi_set_stream_attribute() 213 REG_UPDATE_2(HDMI_CONTROL, in enc314_stream_encoder_hdmi_set_stream_attribute() 219 REG_UPDATE_2(HDMI_CONTROL, in enc314_stream_encoder_hdmi_set_stream_attribute() 232 REG_UPDATE_2(HDMI_CONTROL, in enc314_stream_encoder_hdmi_set_stream_attribute() 244 REG_UPDATE_2(HDMI_CONTROL, in enc314_stream_encoder_hdmi_set_stream_attribute() 340 REG_UPDATE_2(DP_VID_TIMING, in enc314_stream_encoder_dp_unblank()
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn20/ |
| H A D | dcn20_optc.c | 69 REG_UPDATE_2(OTG_CONTROL, in optc2_enable_crtc() 315 REG_UPDATE_2(OTG_GLOBAL_CONTROL1, in optc2_align_vblanks() 361 REG_UPDATE_2(OTG_GLOBAL_CONTROL1, in optc2_align_vblanks() 417 REG_UPDATE_2(OTG_GLOBAL_CONTROL2, GLOBAL_UPDATE_LOCK_EN, 1, in optc2_lock_doublebuffer_enable() 424 REG_UPDATE_2(OTG_GLOBAL_CONTROL1, in optc2_lock_doublebuffer_enable() 440 REG_UPDATE_2(OTG_GLOBAL_CONTROL1, in optc2_lock_doublebuffer_disable() 446 REG_UPDATE_2(OTG_GLOBAL_CONTROL2, GLOBAL_UPDATE_LOCK_EN, 0, in optc2_lock_doublebuffer_disable()
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| H A D | dcn401_dio_stream_encoder.c | 156 REG_UPDATE_2(HDMI_CONTROL, in enc401_stream_encoder_hdmi_set_stream_attribute() 160 REG_UPDATE_2(HDMI_CONTROL, in enc401_stream_encoder_hdmi_set_stream_attribute() 167 REG_UPDATE_2(HDMI_CONTROL, in enc401_stream_encoder_hdmi_set_stream_attribute() 171 REG_UPDATE_2(HDMI_CONTROL, in enc401_stream_encoder_hdmi_set_stream_attribute() 177 REG_UPDATE_2(HDMI_CONTROL, in enc401_stream_encoder_hdmi_set_stream_attribute() 190 REG_UPDATE_2(HDMI_CONTROL, in enc401_stream_encoder_hdmi_set_stream_attribute() 202 REG_UPDATE_2(HDMI_CONTROL, in enc401_stream_encoder_hdmi_set_stream_attribute() 338 REG_UPDATE_2(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 1, DP_VID_STREAM_DIS_DEFER, 2); in enc401_stream_encoder_dp_unblank() 803 REG_UPDATE_2(DME_CONTROL, in enc401_set_dynamic_metadata()
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| H A D | dcn10_stream_encoder.c | 340 REG_UPDATE_2(DP_PIXEL_FORMAT, in enc1_stream_encoder_dp_set_stream_attribute() 519 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute() 525 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute() 534 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute() 540 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute() 548 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute() 563 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute() 575 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute() 999 REG_UPDATE_2(DP_VID_TIMING, in enc1_stream_encoder_dp_unblank() 1263 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, in enc1_se_setup_hdmi_audio() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn32/ |
| H A D | dcn32_hubp.c | 45 REG_UPDATE_2(UCLK_PSTATE_FORCE, in hubp32_update_force_pstate_disallow() 54 REG_UPDATE_2(UCLK_PSTATE_FORCE, in hubp32_update_force_cursor_pstate_disallow() 64 REG_UPDATE_2(DCHUBP_MALL_CONFIG, USE_MALL_SEL, mall_sel, in hubp32_update_mall_sel() 149 REG_UPDATE_2(CURSOR_SIZE, in hubp32_cursor_set_attributes()
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn35/ |
| H A D | dcn35_dpp.c | 49 REG_UPDATE_2(DPP_CONTROL, in dpp35_dppclk_control() 54 REG_UPDATE_2(DPP_CONTROL, in dpp35_dppclk_control() 62 REG_UPDATE_2(DPP_CONTROL, in dpp35_dppclk_control()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_afmt.c | 59 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, in afmt3_setup_hdmi_audio() 66 REG_UPDATE_2(AFMT_60958_0, in afmt3_setup_hdmi_audio() 181 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, in afmt3_setup_dp_audio()
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| /linux/drivers/gpu/drm/amd/display/dc/opp/dcn20/ |
| H A D | dcn20_opp.c | 228 REG_UPDATE_2(DPG_CONTROL, in opp2_set_disp_pattern_generator() 239 REG_UPDATE_2(DPG_CONTROL, in opp2_set_disp_pattern_generator() 250 REG_UPDATE_2(DPG_CONTROL, in opp2_set_disp_pattern_generator() 279 REG_UPDATE_2(DPG_CONTROL, in opp2_set_disp_pattern_generator()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| H A D | dcn10_hubp.c | 46 REG_UPDATE_2(DCHUBP_CNTL, in hubp1_set_blank() 195 REG_UPDATE_2(DCSURF_SURFACE_PITCH, in hubp1_program_size() 199 REG_UPDATE_2(DCSURF_SURFACE_PITCH_C, in hubp1_program_size() 219 REG_UPDATE_2(DCSURF_SURFACE_CONFIG, in hubp1_program_rotation() 223 REG_UPDATE_2(DCSURF_SURFACE_CONFIG, in hubp1_program_rotation() 227 REG_UPDATE_2(DCSURF_SURFACE_CONFIG, in hubp1_program_rotation() 231 REG_UPDATE_2(DCSURF_SURFACE_CONFIG, in hubp1_program_rotation() 254 REG_UPDATE_2(HUBPRET_CONTROL, in hubp1_program_pixel_format() 332 REG_UPDATE_2(DCSURF_SURFACE_CONFIG, in hubp1_program_pixel_format() 337 REG_UPDATE_2(DCSURF_SURFACE_CONFIG, in hubp1_program_pixel_format() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_afmt.c | 64 REG_UPDATE_2(AFMT_MEM_PWR, AFMT_MEM_PWR_DIS, 0, AFMT_MEM_PWR_FORCE, 1); in afmt31_powerdown() 74 REG_UPDATE_2(AFMT_MEM_PWR, AFMT_MEM_PWR_DIS, 1, AFMT_MEM_PWR_FORCE, 0); in afmt31_poweron()
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| H A D | dcn31_vpg.c | 59 REG_UPDATE_2(VPG_MEM_PWR, VPG_GSP_MEM_LIGHT_SLEEP_DIS, 0, VPG_GSP_LIGHT_SLEEP_FORCE, 1); in vpg31_powerdown() 74 REG_UPDATE_2(VPG_MEM_PWR, VPG_GSP_MEM_LIGHT_SLEEP_DIS, 1, VPG_GSP_LIGHT_SLEEP_FORCE, 0); in vpg31_poweron()
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