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Searched refs:Mailbox (Results 1 – 25 of 26) sorted by relevance

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/linux/drivers/mailbox/
H A DKconfig3 bool "Mailbox Hardware Support"
5 Mailbox is a framework to control hardware communication between
12 tristate "ARM MHU Mailbox"
20 tristate "ARM MHUv2 Mailbox"
27 tristate "ARM MHUv3 Mailbox"
43 Mailbox driver implementation for ASPEED AST27XX SoCs. This driver
52 Mailbox driver implementation for Sophgo CV18XX SoCs. This driver
59 tristate "Exynos Mailbox"
62 Say Y here if you want to build the Samsung Exynos Mailbox controller
70 tristate "i.MX Mailbox"
[all …]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dhisilicon,hi6220-mailbox.txt1 Hisilicon Hi6220 Mailbox Driver
9 Mailbox Device Node:
45 <0x0 0x06dff800 0x0 0x0800>; /* Mailbox */
52 Mailbox client
58 - mboxes: Standard property to specify a Mailbox (See ./mailbox.txt)
59 Cells must match 'mbox-cells' (See Mailbox Device Node above).
H A Dmailbox.txt1 * Generic Mailbox Controller and client driver bindings
3 Generic binding to provide a way for Mailbox controller drivers to
6 * Mailbox Controller
19 * Mailbox Client
H A Daltera-mailbox.txt1 Altera Mailbox Driver
32 Mailbox client
H A Dhisilicon,hi3660-mailbox.txt1 Hisilicon Hi3660 Mailbox Controller
38 - mboxes : Standard property to specify a Mailbox (See ./mailbox.txt)
/linux/drivers/scsi/aacraid/
H A Drx.c50 aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5])); in aac_rx_intr_producer()
172 writel(command, &dev->IndexRegs->Mailbox[0]); in rx_sync_cmd()
176 writel(p1, &dev->IndexRegs->Mailbox[1]); in rx_sync_cmd()
177 writel(p2, &dev->IndexRegs->Mailbox[2]); in rx_sync_cmd()
178 writel(p3, &dev->IndexRegs->Mailbox[3]); in rx_sync_cmd()
179 writel(p4, &dev->IndexRegs->Mailbox[4]); in rx_sync_cmd()
234 *status = readl(&dev->IndexRegs->Mailbox[0]); in rx_sync_cmd()
236 *r1 = readl(&dev->IndexRegs->Mailbox[1]); in rx_sync_cmd()
238 *r2 = readl(&dev->IndexRegs->Mailbox[2]); in rx_sync_cmd()
240 *r3 = readl(&dev->IndexRegs->Mailbox[3]); in rx_sync_cmd()
[all …]
H A Dsrc.c129 writel(events, &dev->IndexRegs->Mailbox[0]); in aac_src_intr_message()
220 writel(command, &dev->IndexRegs->Mailbox[0]); in src_sync_cmd()
224 writel(p1, &dev->IndexRegs->Mailbox[1]); in src_sync_cmd()
225 writel(p2, &dev->IndexRegs->Mailbox[2]); in src_sync_cmd()
226 writel(p3, &dev->IndexRegs->Mailbox[3]); in src_sync_cmd()
227 writel(p4, &dev->IndexRegs->Mailbox[4]); in src_sync_cmd()
300 *status = readl(&dev->IndexRegs->Mailbox[0]); in src_sync_cmd()
302 *r1 = readl(&dev->IndexRegs->Mailbox[1]); in src_sync_cmd()
304 *r2 = readl(&dev->IndexRegs->Mailbox[2]); in src_sync_cmd()
306 *r3 = readl(&dev->IndexRegs->Mailbox[3]); in src_sync_cmd()
[all …]
H A Daacraid.h1113 __le32 Mailbox[8]; member
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-intel_sdsi20 EBUSY Mailbox is owned by another agent.
58 a Capability Activation Payload. Mailbox command.
70 fully activate the feature. Mailbox command.
79 utilization metrics of On Demand enabled features. Mailbox
89 information about the current licenses on the CPU. Mailbox
/linux/Documentation/misc-devices/
H A Damd-sbi.rst41 * Mailbox
48 * APML Mailbox messages and Register xfer access are read-write,
/linux/Documentation/networking/device_drivers/ethernet/huawei/
H A Dhinic3.rst85 Mailbox section in Management Interface
88 Mailbox is a communication mechanism between the hinic3 driver and the HW.
/linux/Documentation/accel/amdxdna/
H A Damdnpu.rst92 * Mailbox BAR: Expose the mailbox control registers (head, tail and ISR
101 * On AMD Strix Point device, Mailbox and Public Register BARs are on PCIe BAR
202 8. The driver sends the command over the Mailbox to ERT.
/linux/Documentation/tee/
H A Damd-tee.rst40 | Generic TEE API | | ASP | Mailbox |
/linux/Documentation/driver-api/
H A Dmailbox.rst2 The Common Mailbox Framework
/linux/drivers/firmware/arm_scmi/transports/
H A DKconfig24 tristate "SCMI transport based on Mailbox"
/linux/Documentation/hid/
H A Damd-sfh-hid.rst75 Commands are sent to MP2 using C2P Mailbox registers. Writing into C2P Message registers generates
/linux/Documentation/driver-api/cxl/
H A Dmaturity-map.rst120 Mailbox commands
/linux/Documentation/driver-api/media/drivers/
H A Dcx2341x-devel.rst1985 Mailbox slot, -1 if no mailbox required.
2665 Mailbox slot, -1 if no mailbox required.
3613 Mailbox #10 is reserved for DMA transfer information.
3624 - The driver reads the transfer type, offset and size from Mailbox #10.
3635 Mailbox #10
3640 - Name: Mailbox #10
3654 Card "addresses" are derived from the offset supplied by Mailbox #10. Host
/linux/Documentation/target/
H A Dtcmu-design.rst13 i. Mailbox
122 The Mailbox
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-hikey.dts34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
H A Dhi6220.dtsi797 <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */
/linux/drivers/platform/x86/intel/
H A DKconfig168 This driver provides support for Intel P-Unit Mailbox IPC mechanism,
/linux/Documentation/driver-api/cxl/linux/
H A Dcxl-driver.rst448 Mailbox Interfaces
/linux/drivers/message/fusion/lsi/
H A Dmpi_history.txt681 * 07-12-02 01.02.07 Added structures for Mailbox request and reply.
/linux/drivers/scsi/aic7xxx/
H A Daic79xx.reg298 * Host Mailbox

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