Searched refs:DWC2_CORE_REV_MASK (Results 1 – 3 of 3) sorted by relevance
431 if ((hsotg->hw_params.snpsid & DWC2_CORE_REV_MASK) < in dwc2_core_reset()432 (DWC2_CORE_REV_4_20a & DWC2_CORE_REV_MASK)) { in dwc2_core_reset()995 if ((gsnpsid & ~DWC2_CORE_REV_MASK) != DWC2_OTG_ID || in dwc2_set_clock_switch_timer()
794 if ((gsnpsid & ~DWC2_CORE_REV_MASK) == DWC2_FS_IOT_ID || in dwc2_check_param_eusb2_disc()795 (gsnpsid & DWC2_CORE_REV_MASK) < in dwc2_check_param_eusb2_disc()796 (DWC2_CORE_REV_5_00a & DWC2_CORE_REV_MASK)) { in dwc2_check_param_eusb2_disc()
1125 #define DWC2_CORE_REV_MASK 0x0000ffff macro