Searched refs:DP_TCL_NUM_RING_MAX (Results 1 – 8 of 8) sorted by relevance
189 #define DP_TCL_NUM_RING_MAX 4 macro430 u32 desc_na[DP_TCL_NUM_RING_MAX];449 u32 tx_enqueued[DP_TCL_NUM_RING_MAX];450 u32 tx_completed[DP_TCL_NUM_RING_MAX];476 struct dp_tx_ring tx_ring[DP_TCL_NUM_RING_MAX];493 struct ath12k_hp_update_timer tx_ring_timer[DP_TCL_NUM_RING_MAX];
1112 for (i = 0; i < DP_TCL_NUM_RING_MAX; i++) in ath12k_debugfs_dump_device_dp_stats()1146 for (i = 0; i < DP_TCL_NUM_RING_MAX; i++) in ath12k_debugfs_dump_device_dp_stats()1154 for (i = 0; i < DP_TCL_NUM_RING_MAX; i++) in ath12k_debugfs_dump_device_dp_stats()
17 ath12k_hal_tcl_to_wbm_rbm_map_wcn7850[DP_TCL_NUM_RING_MAX];
21 ath12k_hal_tcl_to_wbm_rbm_map_qcn9274[DP_TCL_NUM_RING_MAX];
744 ath12k_hal_tcl_to_wbm_rbm_map_wcn7850[DP_TCL_NUM_RING_MAX] = {
978 ath12k_hal_tcl_to_wbm_rbm_map_qcn9274[DP_TCL_NUM_RING_MAX] = {
201 #define DP_TCL_NUM_RING_MAX 3 macro274 struct dp_tx_ring tx_ring[DP_TCL_NUM_RING_MAX];288 struct ath11k_hp_update_timer tx_ring_timer[DP_TCL_NUM_RING_MAX];
888 u32 desc_na[DP_TCL_NUM_RING_MAX];