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Searched refs:CLK_OPS_PARENT_ENABLE (Results 1 – 25 of 46) sorted by relevance

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/linux/drivers/clk/stm32/
H A Dclk-stm32mp13.c948 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
956 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
964 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
972 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
980 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
988 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
996 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
1004 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
1012 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
1020 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
[all …]
H A Dclk-stm32mp1.c1393 COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE |\
1837 MUX(CK_PER, "ck_per", per_src, CLK_OPS_PARENT_ENABLE,
1840 MUX(CK_MPU, "ck_mpu", cpu_src, CLK_OPS_PARENT_ENABLE |
1844 CLK_OPS_PARENT_ENABLE,
1850 CLK_OPS_PARENT_ENABLE,
2054 COMPOSITE(NO_ID, "ck_ker_eth", eth_src, CLK_OPS_PARENT_ENABLE |
2062 DIV(ETHPTP_K, "ethptp_k", "ck_ker_eth", CLK_OPS_PARENT_ENABLE |
2066 COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE,
2072 COMPOSITE(CK_MCO1, "ck_mco1", mco1_src, CLK_OPS_PARENT_ENABLE |
2078 COMPOSITE(CK_MCO2, "ck_mco2", mco2_src, CLK_OPS_PARENT_ENABLE |
[all …]
/linux/drivers/clk/mediatek/
H A Dclk-mt8196-venc.c48 .flags = CLK_OPS_PARENT_ENABLE, \
61 CLK_OPS_PARENT_ENABLE, \
75 .flags = CLK_OPS_PARENT_ENABLE \
120 .flags = CLK_OPS_PARENT_ENABLE, \
132 .flags = CLK_OPS_PARENT_ENABLE, \
143 .flags = CLK_OPS_PARENT_ENABLE \
185 .flags = CLK_OPS_PARENT_ENABLE, \
196 .flags = CLK_OPS_PARENT_ENABLE, \
H A Dclk-mt8196-vdec.c62 .flags = CLK_OPS_PARENT_ENABLE, \
73 .flags = CLK_OPS_PARENT_ENABLE, \
84 .flags = CLK_OPS_PARENT_ENABLE | \
163 .flags = CLK_OPS_PARENT_ENABLE, \
174 .flags = CLK_OPS_PARENT_ENABLE, \
185 .flags = CLK_OPS_PARENT_ENABLE \
196 .flags = CLK_OPS_PARENT_ENABLE, \
207 .flags = CLK_OPS_PARENT_ENABLE | \
H A Dclk-mt8196-disp0.c48 .flags = CLK_OPS_PARENT_ENABLE, \
60 .flags = CLK_OPS_PARENT_ENABLE \
69 .flags = CLK_OPS_PARENT_ENABLE, \
81 .flags = CLK_OPS_PARENT_ENABLE, \
H A Dclk-mt8196-disp1.c48 .flags = CLK_OPS_PARENT_ENABLE, \
60 .flags = CLK_OPS_PARENT_ENABLE, \
69 .flags = CLK_OPS_PARENT_ENABLE, \
H A Dclk-mt8196-vdisp_ao.c37 .flags = CLK_OPS_PARENT_ENABLE | \
49 .flags = CLK_OPS_PARENT_ENABLE, \
H A Dclk-mt8196-imp_iic_wrap.c30 .flags = CLK_OPS_PARENT_ENABLE, \
69 .flags = CLK_OPS_PARENT_ENABLE, \
H A Dclk-mt8196-ovl0.c50 .flags = CLK_OPS_PARENT_ENABLE, \
61 .flags = CLK_OPS_PARENT_ENABLE, \
H A Dclk-mt8196-ovl1.c50 .flags = CLK_OPS_PARENT_ENABLE, \
61 .flags = CLK_OPS_PARENT_ENABLE, \
H A Dclk-mt8196-mdpsys.c42 .flags = CLK_OPS_PARENT_ENABLE, \
61 .flags = CLK_OPS_PARENT_ENABLE, \
H A Dclk-mt8195-imp_iic_wrap.c21 &mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
H A Dclk-mt8188-imp_iic_wrap.c24 &mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
H A Dclk-mt8192-imp_iic_wrap.c23 &mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
/linux/drivers/clk/qcom/
H A Dlpass-gfm-sm8250.c75 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
95 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
115 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
135 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
155 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
175 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Dgcc-sm6115.c726 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
749 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
764 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
779 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
801 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
816 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
831 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
846 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
1035 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
1057 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
[all …]
H A Ddispcc-qcm2290.c135 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
228 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Ddispcc-sm6115.c161 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE | CLK_GET_RATE_NOCACHE,
254 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE | CLK_GET_RATE_NOCACHE,
H A Ddispcc-sm6375.c154 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
211 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Ddispcc-sm8750.c396 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
411 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
715 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
730 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
745 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Ddispcc-sm6350.c300 .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE | CLK_OPS_PARENT_ENABLE,
379 .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE | CLK_OPS_PARENT_ENABLE,
/linux/drivers/clk/imx/
H A Dclk.h185 __imx_clk_hw_gate2(name, parent, reg, shift, 0x3, CLK_OPS_PARENT_ENABLE, shared_count)
191 __imx_clk_hw_gate(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE, 0)
197 imx_clk_hw_gate2_flags(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE)
212 __imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags | CLK_OPS_PARENT_ENABLE, 0)
219 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE)
410 (CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
475 CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
H A Dclk-imx7d.c708 …root_clk", "ahb_root_clk", base + 0x9080, 0, 2, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE | CLK_SET_… in imx7d_clocks_init()
772 …= imx_clk_hw_gate2_flags("arm_a7_root_clk", "arm_a7_div", base + 0x4000, 0, CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
774 …gs("main_axi_root_clk", "axi_post_div", base + 0x4040, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
779 …flags("dram_root_clk", "dram_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
780 …s("dram_phym_root_clk", "dram_phym_cg", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
781 …lt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
782 …ram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
H A Dclk-imx8mq.c576 …_flags("vpu_g1_root_clk", "vpu_g1", base + 0x4560, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); in imx8mq_clocks_probe()
578 …_flags("vpu_g2_root_clk", "vpu_g2", base + 0x45a0, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); in imx8mq_clocks_probe()
584 …lags("vpu_dec_root_clk", "vpu_bus", base + 0x4630, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); in imx8mq_clocks_probe()
H A Dclk-gate-93.c180 init.flags = flags | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE; in imx93_clk_gate()

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