xref: /kvm-unit-tests/lib/riscv/asm/csr.h (revision 0182459af36445327a0a4f6e724e550e27863168)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 #ifndef _ASMRISCV_CSR_H_
3 #define _ASMRISCV_CSR_H_
4 #include <linux/const.h>
5 
6 #define CSR_SSTATUS		0x100
7 #define CSR_SIE			0x104
8 #define CSR_STVEC		0x105
9 #define CSR_SSCRATCH		0x140
10 #define CSR_SEPC		0x141
11 #define CSR_SCAUSE		0x142
12 #define CSR_STVAL		0x143
13 #define CSR_SIP			0x144
14 #define CSR_STIMECMP		0x14d
15 #define CSR_STIMECMPH		0x15d
16 #define CSR_SATP		0x180
17 #define CSR_TIME		0xc01
18 
19 #define SR_SIE			_AC(0x00000002, UL)
20 #define SR_SPP			_AC(0x00000100, UL)
21 #define SR_SDT			_AC(0x01000000, UL) /* Supervisor Double Trap */
22 
23 /* Exception cause high bit - is an interrupt if set */
24 #define CAUSE_IRQ_FLAG		(_AC(1, UL) << (__riscv_xlen - 1))
25 
26 /* Exception causes */
27 #define EXC_INST_MISALIGNED	0
28 #define EXC_INST_ACCESS		1
29 #define EXC_INST_ILLEGAL	2
30 #define EXC_BREAKPOINT		3
31 #define EXC_LOAD_MISALIGNED	4
32 #define EXC_LOAD_ACCESS		5
33 #define EXC_STORE_MISALIGNED	6
34 #define EXC_STORE_ACCESS	7
35 #define EXC_SYSCALL		8
36 #define EXC_HYPERVISOR_SYSCALL	9
37 #define EXC_SUPERVISOR_SYSCALL	10
38 #define EXC_INST_PAGE_FAULT	12
39 #define EXC_LOAD_PAGE_FAULT	13
40 #define EXC_STORE_PAGE_FAULT	15
41 #define EXC_INST_GUEST_PAGE_FAULT	20
42 #define EXC_LOAD_GUEST_PAGE_FAULT	21
43 #define EXC_VIRTUAL_INST_FAULT		22
44 #define EXC_STORE_GUEST_PAGE_FAULT	23
45 
46 /* Interrupt causes */
47 #define IRQ_S_SOFT		1
48 #define IRQ_VS_SOFT		2
49 #define IRQ_S_TIMER		5
50 #define IRQ_VS_TIMER		6
51 #define IRQ_S_EXT		9
52 #define IRQ_VS_EXT		10
53 #define IRQ_S_GEXT		12
54 #define IRQ_PMU_OVF		13
55 
56 #define IE_SSIE			(_AC(1, UL) << IRQ_S_SOFT)
57 #define IE_TIE			(_AC(1, UL) << IRQ_S_TIMER)
58 
59 #define IP_TIP			IE_TIE
60 
61 #ifndef __ASSEMBLER__
62 
63 #define csr_swap(csr, val)					\
64 ({								\
65 	unsigned long __v = (unsigned long)(val);		\
66 	__asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
67 				: "=r" (__v) : "rK" (__v)	\
68 				: "memory");			\
69 	__v;							\
70 })
71 
72 #define csr_read(csr)						\
73 ({								\
74 	register unsigned long __v;				\
75 	__asm__ __volatile__ ("csrr %0, " __ASM_STR(csr)	\
76 				: "=r" (__v) :			\
77 				: "memory");			\
78 	__v;							\
79 })
80 
81 #define csr_write(csr, val)					\
82 ({								\
83 	unsigned long __v = (unsigned long)(val);		\
84 	__asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0"	\
85 				: : "rK" (__v)			\
86 				: "memory");			\
87 })
88 
89 #define csr_read_set(csr, val)					\
90 ({								\
91 	unsigned long __v = (unsigned long)(val);		\
92 	__asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
93 				: "=r" (__v) : "rK" (__v)	\
94 				: "memory");			\
95 	__v;							\
96 })
97 
98 #define csr_set(csr, val)					\
99 ({								\
100 	unsigned long __v = (unsigned long)(val);		\
101 	__asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0"	\
102 				: : "rK" (__v)			\
103 				: "memory");			\
104 })
105 
106 #define csr_read_clear(csr, val)				\
107 ({								\
108 	unsigned long __v = (unsigned long)(val);		\
109 	__asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
110 				: "=r" (__v) : "rK" (__v)	\
111 				: "memory");			\
112 	__v;							\
113 })
114 
115 #define csr_clear(csr, val)					\
116 ({								\
117 	unsigned long __v = (unsigned long)(val);		\
118 	__asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0"	\
119 				: : "rK" (__v)			\
120 				: "memory");			\
121 })
122 
123 #endif /* !__ASSEMBLER__ */
124 #endif /* _ASMRISCV_CSR_H_ */
125