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/linux/arch/arm/boot/dts/ti/omap/
H A Domap3xxx-clocks.dtsi3 * Device Tree Source for OMAP3 clock data
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-frequency = <16800000>;
15 #clock-cells = <0>;
16 compatible = "ti,mux-clock";
22 #clock-cells = <0>;
23 compatible = "ti,divider-clock";
32 #clock-cells = <0>;
33 compatible = "ti,gate-clock";
[all...]
H A Dam43xx-clocks.dtsi3 * Device Tree Source for AM43xx clock data
8 sys_clkin_ck: clock-sys-clkin-31@40 {
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 {
18 #clock-cells = <0>;
19 compatible = "ti,mux-clock";
20 clock-output-names = "crystal_freq_sel_ck";
26 sysboot_freq_sel_ck: clock
[all...]
H A Ddra7xx-clocks.dtsi3 * Device Tree Source for DRA7xx clock data
8 atl_clkin0_ck: clock-atl-clkin0 {
9 #clock-cells = <0>;
10 compatible = "ti,dra7-atl-clock";
11 clock-output-names = "atl_clkin0_ck";
15 atl_clkin1_ck: clock-atl-clkin1 {
16 #clock-cells = <0>;
17 compatible = "ti,dra7-atl-clock";
18 clock-output-names = "atl_clkin1_ck";
22 atl_clkin2_ck: clock
[all...]
H A Domap54xx-clocks.dtsi3 * Device Tree Source for OMAP5 clock data
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-output-names = "pad_clks_src_ck";
12 clock-frequency = <12000000>;
16 #clock-cells = <0>;
17 compatible = "ti,gate-clock";
18 clock-output-names = "pad_clks_ck";
25 #clock-cells = <0>;
26 compatible = "fixed-clock";
[all...]
H A Domap44xx-clocks.dtsi3 * Device Tree Source for OMAP4 clock data
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-output-names = "extalt_clkin_ck";
12 clock-frequency = <59000000>;
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
18 clock-output-names = "pad_clks_src_ck";
19 clock-frequency = <12000000>;
23 #clock
[all...]
H A Domap24xx-clocks.dtsi3 * Device Tree Source for OMAP24xx clock data
9 #clock-cells = <0>;
10 compatible = "ti,composite-mux-clock";
17 #clock-cells = <0>;
18 compatible = "ti,composite-clock";
23 #clock-cells = <0>;
24 compatible = "ti,composite-mux-clock";
31 #clock-cells = <0>;
32 compatible = "ti,composite-clock";
39 #clock
[all...]
H A Domap34xx-omap36xx-clocks.dtsi3 * Device Tree Source for OMAP34XX/OMAP36XX clock data
9 #clock-cells = <0>;
10 compatible = "fixed-factor-clock";
12 clock-mult = <1>;
13 clock-div = <1>;
16 clock@a14 {
19 #clock-cells = <2>;
23 aes1_ick: clock-aes1-ick@3 {
25 #clock-cells = <0>;
26 compatible = "ti,omap3-interface-clock";
[all...]
H A Domap36xx-omap3430es2plus-clocks.dtsi3 * Device Tree Source for OMAP34xx/OMAP36xx clock data
8 clock@a00 {
11 #clock-cells = <2>;
15 ssi_ssr_gate_fck_3430es2: clock-ssi-ssr-gate-fck-3430es2@0 {
17 #clock-cells = <0>;
18 compatible = "ti,composite-no-wait-gate-clock";
19 clock-output-names = "ssi_ssr_gate_fck_3430es2";
24 clock@a40 {
27 #clock-cells = <2>;
31 ssi_ssr_div_fck_3430es2: clock
[all...]
H A Ddm814x-clocks.dtsi10 #clock-cells = <1>;
11 compatible = "ti,dm814-adpll-s-clock";
14 clock-names = "clkinp", "clkinpulow", "clkinphif";
15 clock-output-names = "481c5040.adpll.dcoclkldo",
22 #clock-cells = <1>;
23 compatible = "ti,dm814-adpll-lj-clock";
26 clock-names = "clkinp", "clkinpulow";
27 clock-output-names = "481c5080.adpll.dcoclkldo",
33 #clock-cells = <1>;
34 compatible = "ti,dm814-adpll-lj-clock";
[all...]
H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi3 * Device Tree Source for OMAP36xx/AM35xx/OMAP34xx clock data
9 #clock-cells = <0>;
10 compatible = "fixed-factor-clock";
12 clock-mult = <1>;
13 clock-div = <3>;
17 #clock-cells = <0>;
18 compatible = "fixed-factor-clock";
20 clock-mult = <1>;
21 clock-div = <5>;
26 #clock
[all...]
H A Domap3430es1-clocks.dtsi3 * Device Tree Source for OMAP3430 ES1 clock data
9 #clock-cells = <0>;
10 compatible = "ti,wait-gate-clock";
17 #clock-cells = <0>;
18 compatible = "ti,divider-clock";
26 #clock-cells = <0>;
27 compatible = "fixed-factor-clock";
29 clock-mult = <1>;
30 clock-div = <1>;
34 #clock
[all...]
H A Ddm816x-clocks.dtsi5 #clock-cells = <1>;
6 compatible = "ti,dm816-fapll-clock";
9 clock-indices = <1>, <2>, <3>, <4>, <5>,
11 clock-output-names = "main_pll_clk1",
21 #clock-cells = <1>;
22 compatible = "ti,dm816-fapll-clock";
25 clock-indices = <1>, <2>, <3>, <4>;
26 clock-output-names = "ddr_pll_clk1",
33 #clock-cells = <1>;
34 compatible = "ti,dm816-fapll-clock";
[all...]
H A Domap2430-clocks.dtsi3 * Device Tree Source for OMAP2430 clock data
10 #clock-cells = <0>;
11 compatible = "ti,composite-mux-clock";
17 #clock-cells = <0>;
18 compatible = "ti,composite-clock";
23 #clock-cells = <0>;
24 compatible = "ti,composite-mux-clock";
31 #clock-cells = <0>;
32 compatible = "ti,composite-clock";
37 #clock
[all...]
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-clocks.dtsi3 * Device Tree Source for Keystone 2 clock tree
14 #clock-cells = <0>;
15 compatible = "ti,keystone,pll-mux-clock";
20 clock-output-names = "mainmuxclk";
24 #clock-cells = <0>;
25 compatible = "fixed-factor-clock";
27 clock-div = <1>;
28 clock-mult = <1>;
29 clock-output-names = "chipclk1";
33 #clock
[all...]
H A Dkeystone-k2hk-clocks.dtsi3 * Keystone 2 Kepler/Hawking SoC clock nodes
10 #clock-cells = <0>;
11 compatible = "ti,keystone,pll-clock";
13 clock-output-names = "arm-pll-clk";
19 #clock-cells = <0>;
20 compatible = "ti,keystone,main-pll-clock";
27 #clock-cells = <0>;
28 compatible = "ti,keystone,pll-clock";
30 clock-output-names = "papllclk";
36 #clock
[all...]
H A Dkeystone-k2l-clocks.dtsi3 * Keystone 2 lamarr SoC clock nodes
10 #clock-cells = <0>;
11 compatible = "ti,keystone,pll-clock";
13 clock-output-names = "arm-pll-clk";
19 #clock-cells = <0>;
20 compatible = "ti,keystone,main-pll-clock";
27 #clock-cells = <0>;
28 compatible = "ti,keystone,pll-clock";
30 clock-output-names = "papllclk";
36 #clock
[all...]
/linux/drivers/net/phy/
H A Dmicrochip_rds_ptp.c6 static int mchp_rds_phy_read_mmd(struct mchp_rds_ptp_clock *clock, in mchp_rds_phy_read_mmd() argument
9 struct phy_device *phydev = clock->phydev; in mchp_rds_phy_read_mmd()
12 addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) : in mchp_rds_phy_read_mmd()
13 BASE_CLK(clock))); in mchp_rds_phy_read_mmd()
15 return phy_read_mmd(phydev, PTP_MMD(clock), addr); in mchp_rds_phy_read_mmd()
18 static int mchp_rds_phy_write_mmd(struct mchp_rds_ptp_clock *clock, in mchp_rds_phy_write_mmd() argument
22 struct phy_device *phydev = clock->phydev; in mchp_rds_phy_write_mmd()
25 addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) : in mchp_rds_phy_write_mmd()
26 BASE_CLK(clock))); in mchp_rds_phy_write_mmd()
28 return phy_write_mmd(phydev, PTP_MMD(clock), add in mchp_rds_phy_write_mmd()
31 mchp_rds_phy_modify_mmd(struct mchp_rds_ptp_clock * clock,u32 offset,enum mchp_rds_ptp_base base,u16 mask,u16 val) mchp_rds_phy_modify_mmd() argument
44 mchp_rds_phy_set_bits_mmd(struct mchp_rds_ptp_clock * clock,u32 offset,enum mchp_rds_ptp_base base,u16 val) mchp_rds_phy_set_bits_mmd() argument
105 mchp_general_event_config(struct mchp_rds_ptp_clock * clock,int pulse_width) mchp_general_event_config() argument
124 mchp_set_clock_reload(struct mchp_rds_ptp_clock * clock,s64 period_sec,u32 period_nsec) mchp_set_clock_reload() argument
156 mchp_set_clock_target(struct mchp_rds_ptp_clock * clock,s64 start_sec,u32 start_nsec) mchp_set_clock_target() argument
185 mchp_rds_ptp_perout_off(struct mchp_rds_ptp_clock * clock) mchp_rds_ptp_perout_off() argument
208 mchp_get_event(struct mchp_rds_ptp_clock * clock,int pin) mchp_get_event() argument
221 struct mchp_rds_ptp_clock *clock = container_of(ptpci, mchp_rds_ptp_perout() local
272 struct mchp_rds_ptp_clock *clock = container_of(ptpci, mchp_rds_ptpci_verify() local
290 mchp_rds_ptp_flush_fifo(struct mchp_rds_ptp_clock * clock,enum mchp_rds_ptp_fifo_dir dir) mchp_rds_ptp_flush_fifo() argument
313 mchp_rds_ptp_config_intr(struct mchp_rds_ptp_clock * clock,bool enable) mchp_rds_ptp_config_intr() argument
325 struct mchp_rds_ptp_clock *clock = container_of(mii_ts, mchp_rds_ptp_txtstamp() local
368 mchp_rds_ptp_match_skb(struct mchp_rds_ptp_clock * clock,struct mchp_rds_ptp_rx_ts * rx_ts) mchp_rds_ptp_match_skb() argument
401 mchp_rds_ptp_match_rx_ts(struct mchp_rds_ptp_clock * clock,struct mchp_rds_ptp_rx_ts * rx_ts) mchp_rds_ptp_match_rx_ts() argument
418 mchp_rds_ptp_match_rx_skb(struct mchp_rds_ptp_clock * clock,struct sk_buff * skb) mchp_rds_ptp_match_rx_skb() argument
457 struct mchp_rds_ptp_clock *clock = container_of(mii_ts, mchp_rds_ptp_rxtstamp() local
483 struct mchp_rds_ptp_clock *clock = mchp_rds_ptp_hwtstamp() local
597 struct mchp_rds_ptp_clock *clock = container_of(mii_ts, mchp_rds_ptp_ts_info() local
620 struct mchp_rds_ptp_clock *clock = container_of(info, mchp_rds_ptp_ltc_adjtime() local
734 struct mchp_rds_ptp_clock *clock = container_of(info, mchp_rds_ptp_ltc_adjfine() local
778 struct mchp_rds_ptp_clock *clock = container_of(info, mchp_rds_ptp_ltc_gettime64() local
841 struct mchp_rds_ptp_clock *clock = container_of(info, mchp_rds_ptp_ltc_settime64() local
909 mchp_rds_ptp_match_tx_skb(struct mchp_rds_ptp_clock * clock,u32 seconds,u32 nsec,u16 seq_id) mchp_rds_ptp_match_tx_skb() argument
939 mchp_rds_ptp_get_rx_ts(struct mchp_rds_ptp_clock * clock) mchp_rds_ptp_get_rx_ts() argument
991 mchp_rds_ptp_process_rx_ts(struct mchp_rds_ptp_clock * clock) mchp_rds_ptp_process_rx_ts() argument
1009 mchp_rds_ptp_get_tx_ts(struct mchp_rds_ptp_clock * clock,u32 * sec,u32 * nsec,u16 * seq) mchp_rds_ptp_get_tx_ts() argument
1050 mchp_rds_ptp_process_tx_ts(struct mchp_rds_ptp_clock * clock) mchp_rds_ptp_process_tx_ts() argument
1068 mchp_rds_ptp_top_config_intr(struct mchp_rds_ptp_clock * clock,u16 reg,u16 val,bool clear) mchp_rds_ptp_top_config_intr() argument
1080 mchp_rds_ptp_handle_interrupt(struct mchp_rds_ptp_clock * clock) mchp_rds_ptp_handle_interrupt() argument
1116 mchp_rds_ptp_init(struct mchp_rds_ptp_clock * clock) mchp_rds_ptp_init() argument
1223 struct mchp_rds_ptp_clock *clock; mchp_rds_ptp_probe() local
[all...]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420.dtsi14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
39 clocks = <&clock CLK_DOUT_ACLK400_DISP1>;
40 clock-names = "bus";
46 clocks = <&clock CLK_DOUT_ACLK300_DISP1>;
47 clock-names = "bus";
53 clocks = <&clock CLK_DOUT_ACLK200_FSYS>;
54 clock-names = "bus";
60 clocks = <&clock CLK_DOUT_ACLK200_FSYS2>;
61 clock
285 clock: clock-controller@10010000 { global() label
[all...]
H A Dexynos5410.dtsi14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
37 clock-frequency = <1600000000>;
44 clock-frequency = <1600000000>;
51 clock-frequency = <1600000000>;
58 clock-frequency = <1600000000>;
71 clock-names = "clkout16";
73 #clock-cells = <1>;
76 clock: clock label
[all...]
H A Dexynos5250.dtsi17 #include <dt-bindings/clock/exynos5250.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
64 clocks = <&clock CLK_ARM_CLK>;
65 clock-names = "cpu";
73 clocks = <&clock CLK_ARM_CLK>;
74 clock-names = "cpu";
87 clock-latency-ns = <140000>;
92 clock-latency-ns = <140000>;
97 clock-latency-ns = <140000>;
102 clock
227 clock: clock-controller@10010000 { global() label
[all...]
/linux/fs/bcachefs/
H A Dclock.c3 #include "clock.h"
22 void bch2_io_timer_add(struct io_clock *clock, struct io_timer *timer) in bch2_io_timer_add() argument
24 spin_lock(&clock->timer_lock); in bch2_io_timer_add()
26 if (time_after_eq64((u64) atomic64_read(&clock->now), timer->expire)) { in bch2_io_timer_add()
27 spin_unlock(&clock->timer_lock); in bch2_io_timer_add()
32 for (size_t i = 0; i < clock->timers.nr; i++) in bch2_io_timer_add()
33 if (clock->timers.data[i] == timer) in bch2_io_timer_add()
36 BUG_ON(!min_heap_push(&clock->timers, &timer, &callbacks, NULL)); in bch2_io_timer_add()
38 spin_unlock(&clock->timer_lock); in bch2_io_timer_add()
41 void bch2_io_timer_del(struct io_clock *clock, struc argument
69 bch2_io_clock_schedule_timeout(struct io_clock * clock,u64 until) bch2_io_clock_schedule_timeout() argument
83 bch2_kthread_io_clock_wait_once(struct io_clock * clock,u64 io_until,unsigned long cpu_timeout) bch2_kthread_io_clock_wait_once() argument
107 bch2_kthread_io_clock_wait(struct io_clock * clock,u64 io_until,unsigned long cpu_timeout) bch2_kthread_io_clock_wait() argument
118 get_expired_timer(struct io_clock * clock,u64 now) get_expired_timer() argument
131 __bch2_increment_clock(struct io_clock * clock,u64 sectors) __bch2_increment_clock() argument
142 bch2_io_timers_to_text(struct printbuf * out,struct io_clock * clock) bch2_io_timers_to_text() argument
160 bch2_io_clock_exit(struct io_clock * clock) bch2_io_clock_exit() argument
166 bch2_io_clock_init(struct io_clock * clock) bch2_io_clock_init() argument
[all...]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-audio.dtsi7 #include <dt-bindings/clock/imx8-clock.h>
8 #include <dt-bindings/clock/imx8-lpcg.h>
12 audio_ipg_clk: clock-audio-ipg {
13 compatible = "fixed-clock";
14 #clock-cells = <0>;
15 clock-frequency = <120000000>;
16 clock-output-names = "audio_ipg_clk";
19 clk_ext_aud_mclk0: clock-ext-aud-mclk0 {
20 compatible = "fixed-clock";
[all...]
H A Dimx8-ss-img.dtsi6 img_ipg_clk: clock-img-ipg {
7 compatible = "fixed-clock";
8 #clock-cells = <0>;
9 clock-frequency = <200000000>;
10 clock-output-names = "img_ipg_clk";
13 img_pxl_clk: clock-img-pxl {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <600000000>;
17 clock
[all...]
/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-clks.dtsi8 adl3clk_100mhz: uartspiclk_100mhz: clock-100000000 {
9 compatible = "fixed-clock";
10 #clock-cells = <0>;
11 clock-frequency = <100000000>;
12 clock-output-names = "adl3clk_100mhz";
15 ccpclk_375mhz: clock-375000000 {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <375000000>;
19 clock
[all...]
/linux/arch/arm64/boot/dts/arm/
H A Djuno-clocks.dtsi11 soc_uartclk: clock-7372800 {
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <7372800>;
15 clock-output-names = "juno:uartclk";
18 soc_usb48mhz: clock-48000000 {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <48000000>;
22 clock
[all...]

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