Searched hist:d40b55bc1b8630a0028f54d9df376930e133cc4a (Results 1 – 2 of 2) sorted by relevance
| /qemu/target/mips/tcg/system/ |
| H A D | cp0_helper.c | d40b55bc1b8630a0028f54d9df376930e133cc4a Fri Nov 06 04:21:45 UTC 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> target/mips: Fix PageMask with variable page size
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's no longer true.
Fixes: ee3863b9d414 ("target/mips: Support variable page size")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <1604636510-8347-2-git-send-email-chenhc@lemote.com>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMD: Replaced find_first_zero_bit() by cto32()]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
|
| /qemu/target/mips/ |
| H A D | cpu.h | d40b55bc1b8630a0028f54d9df376930e133cc4a Fri Nov 06 04:21:45 UTC 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> target/mips: Fix PageMask with variable page size
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's no longer true.
Fixes: ee3863b9d414 ("target/mips: Support variable page size")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <1604636510-8347-2-git-send-email-chenhc@lemote.com>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMD: Replaced find_first_zero_bit() by cto32()]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
|