Searched hist:"4 faa3e6f906c832f4c5382fbd618e368525ad2dc" (Results 1 – 4 of 4) sorted by relevance
| /qemu/hw/riscv/ |
| H A D | riscv-iommu-hpm.h | 4faa3e6f906c832f4c5382fbd618e368525ad2dc Mon Feb 24 19:08:23 UTC 2025 Tomasz Jeznach <tjeznach@rivosinc.com> hw/riscv/riscv-iommu: add hpm events mmio write
To support hpm events mmio writes, done via
riscv_iommu_process_hpmevt_write(), we're also adding the 'hpm-counters'
IOMMU property that are used to determine the amount of counters
available in the IOMMU.
Note that everything we did so far didn't change any IOMMU behavior
because we're still not advertising HPM capability to software. This
will be done in the next patch.
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250224190826.1858473-9-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|
| H A D | riscv-iommu-hpm.c | 4faa3e6f906c832f4c5382fbd618e368525ad2dc Mon Feb 24 19:08:23 UTC 2025 Tomasz Jeznach <tjeznach@rivosinc.com> hw/riscv/riscv-iommu: add hpm events mmio write
To support hpm events mmio writes, done via
riscv_iommu_process_hpmevt_write(), we're also adding the 'hpm-counters'
IOMMU property that are used to determine the amount of counters
available in the IOMMU.
Note that everything we did so far didn't change any IOMMU behavior
because we're still not advertising HPM capability to software. This
will be done in the next patch.
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250224190826.1858473-9-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|
| H A D | riscv-iommu.h | 4faa3e6f906c832f4c5382fbd618e368525ad2dc Mon Feb 24 19:08:23 UTC 2025 Tomasz Jeznach <tjeznach@rivosinc.com> hw/riscv/riscv-iommu: add hpm events mmio write
To support hpm events mmio writes, done via
riscv_iommu_process_hpmevt_write(), we're also adding the 'hpm-counters'
IOMMU property that are used to determine the amount of counters
available in the IOMMU.
Note that everything we did so far didn't change any IOMMU behavior
because we're still not advertising HPM capability to software. This
will be done in the next patch.
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250224190826.1858473-9-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|
| H A D | riscv-iommu.c | 4faa3e6f906c832f4c5382fbd618e368525ad2dc Mon Feb 24 19:08:23 UTC 2025 Tomasz Jeznach <tjeznach@rivosinc.com> hw/riscv/riscv-iommu: add hpm events mmio write
To support hpm events mmio writes, done via
riscv_iommu_process_hpmevt_write(), we're also adding the 'hpm-counters'
IOMMU property that are used to determine the amount of counters
available in the IOMMU.
Note that everything we did so far didn't change any IOMMU behavior
because we're still not advertising HPM capability to software. This
will be done in the next patch.
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250224190826.1858473-9-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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