xref: /qemu/hw/riscv/riscv-iommu-hpm.h (revision 9ee727802012ddb32e193d84052a44e382088277)
14faea7e0STomasz Jeznach /*
24faea7e0STomasz Jeznach  * RISC-V IOMMU - Hardware Performance Monitor (HPM) helpers
34faea7e0STomasz Jeznach  *
44faea7e0STomasz Jeznach  * Copyright (C) 2022-2023 Rivos Inc.
54faea7e0STomasz Jeznach  *
64faea7e0STomasz Jeznach  * This program is free software; you can redistribute it and/or modify it
74faea7e0STomasz Jeznach  * under the terms and conditions of the GNU General Public License,
84faea7e0STomasz Jeznach  * version 2 or later, as published by the Free Software Foundation.
94faea7e0STomasz Jeznach  *
104faea7e0STomasz Jeznach  * This program is distributed in the hope that it will be useful,
114faea7e0STomasz Jeznach  * but WITHOUT ANY WARRANTY; without even the implied warranty of
124faea7e0STomasz Jeznach  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
134faea7e0STomasz Jeznach  * GNU General Public License for more details.
144faea7e0STomasz Jeznach  *
154faea7e0STomasz Jeznach  * You should have received a copy of the GNU General Public License along
164faea7e0STomasz Jeznach  * with this program; if not, see <http://www.gnu.org/licenses/>.
174faea7e0STomasz Jeznach  */
184faea7e0STomasz Jeznach 
194faea7e0STomasz Jeznach #ifndef HW_RISCV_IOMMU_HPM_H
204faea7e0STomasz Jeznach #define HW_RISCV_IOMMU_HPM_H
214faea7e0STomasz Jeznach 
224faea7e0STomasz Jeznach #include "qom/object.h"
234faea7e0STomasz Jeznach #include "hw/riscv/riscv-iommu.h"
244faea7e0STomasz Jeznach 
254faea7e0STomasz Jeznach uint64_t riscv_iommu_hpmcycle_read(RISCVIOMMUState *s);
2611ecf24cSTomasz Jeznach void riscv_iommu_hpm_incr_ctr(RISCVIOMMUState *s, RISCVIOMMUContext *ctx,
2711ecf24cSTomasz Jeznach                               unsigned event_id);
28ffb37df0STomasz Jeznach void riscv_iommu_hpm_timer_cb(void *priv);
292cf2a6c0STomasz Jeznach void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s, bool prev_cy_inh);
3091dd0bd0STomasz Jeznach void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s);
31*4faa3e6fSTomasz Jeznach void riscv_iommu_process_hpmevt_write(RISCVIOMMUState *s, uint32_t evt_reg);
324faea7e0STomasz Jeznach 
334faea7e0STomasz Jeznach #endif
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