Searched hist:"25 de28220cedadac15021ec40047785f30e153fe" (Results 1 – 3 of 3) sorted by relevance
| /qemu/include/hw/ppc/ |
| H A D | pnv_chip.h | 25de28220cedadac15021ec40047785f30e153fe Fri May 24 01:54:09 UTC 2024 Nicholas Piggin <npiggin@gmail.com> ppc/pnv: Extend chip_pir class method to TIR as well
The chip_pir chip class method allows the platform to set the PIR
processor identification register. Extend this to a more general
ID function which also allows the TIR to be set. This is in
preparation for "big core", which is a more complicated topology
of cores and threads.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
|
| /qemu/hw/ppc/ |
| H A D | pnv_core.c | 25de28220cedadac15021ec40047785f30e153fe Fri May 24 01:54:09 UTC 2024 Nicholas Piggin <npiggin@gmail.com> ppc/pnv: Extend chip_pir class method to TIR as well
The chip_pir chip class method allows the platform to set the PIR
processor identification register. Extend this to a more general
ID function which also allows the TIR to be set. This is in
preparation for "big core", which is a more complicated topology
of cores and threads.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
|
| H A D | pnv.c | 25de28220cedadac15021ec40047785f30e153fe Fri May 24 01:54:09 UTC 2024 Nicholas Piggin <npiggin@gmail.com> ppc/pnv: Extend chip_pir class method to TIR as well
The chip_pir chip class method allows the platform to set the PIR
processor identification register. Extend this to a more general
ID function which also allows the TIR to be set. This is in
preparation for "big core", which is a more complicated topology
of cores and threads.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
|