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/linux-5.10/Documentation/devicetree/bindings/mmc/
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
11 - Piotr Sroka <piotrs@cadence.com>
14 - $ref: mmc-controller.yaml
19 - enum:
20 - socionext,uniphier-sd4hc
21 - const: cdns,sd4hc
37 cdns,phy-input-delay-sd-highspeed:
[all …]
Dsdhci-sprd.txt1 * Spreadtrum SDHCI controller (sdhci-sprd)
7 and the properties used by the sdhci-sprd driver.
10 - compatible: Should contain "sprd,sdhci-r11".
11 - reg: physical base address of the controller and length.
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
14 - clock-names: Should contain the following:
15 "sdio" - SDIO source clock (required)
16 "enable" - gate clock which used for enabling/disabling the device (required)
17 "2x_enable" - gate clock controlling the device for some special platforms (optional)
[all …]
Dsdhci-st.txt1 * STMicroelectronics sdhci-st MMC/SD controller
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock.
16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
18 - interrupts: One mmc interrupt should be described here.
19 - interrupt-names: Should be "mmcirq".
21 - pinctrl-names: A pinctrl state names "default" must be defined.
[all …]
Dbrcm,sdhci-brcmstb.txt4 and the properties used by the sdhci-brcmstb driver.
6 NOTE: The driver disables all UHS speed modes by default and depends
11 - compatible: should be one of the following
12 - "brcm,bcm7425-sdhci"
13 - "brcm,bcm7445-sdhci"
14 - "brcm,bcm7216-sdhci"
16 Refer to clocks/clock-bindings.txt for generic clock consumer properties.
21 sd-uhs-sdr50;
22 sd-uhs-ddr50;
23 sd-uhs-sdr104;
[all …]
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
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Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
21 - ti,j721e-sdhci-4bit
[all …]
Dsocionext,uniphier-sd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
16 - socionext,uniphier-sd-v2.91
17 - socionext,uniphier-sd-v3.1
18 - socionext,uniphier-sd-v3.1.1
29 reset-names:
36 - const: host
[all …]
/linux-5.10/arch/arm/boot/dts/
Dimx6qdl-colibri-v1_1-uhs.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
32 pinctrl-names = "default", "state_100mhz", "state_200mhz";
33 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
34 pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
35 pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
36 vmmc-supply = <&reg_module_3v3>;
37 vqmmc-supply = <&vgen3_reg>;
38 wakeup-source;
39 keep-power-in-suspend;
40 sd-uhs-sdr12;
[all …]
Drk3288-veyron-sdmmc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 sdcard-supply = <&vccio_sd>;
18 sdmmc_bus4: sdmmc-bus4 {
25 sdmmc_clk: sdmmc-clk {
29 sdmmc_cmd: sdmmc-cmd {
39 sdmmc_cd_disabled: sdmmc-cd-disabled {
44 sdmmc_cd_pin: sdmmc-cd-pin {
51 vcc9-supply = <&vcc_5v>;
55 regulator-name = "vccio_sd";
56 regulator-min-microvolt = <1800000>;
[all …]
Dstih410-b2120.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "stihxxx-b2120.dtsi"
11 compatible = "st,stih410-b2120", "st,stih410";
15 stdout-path = &sbc_serial0;
31 max-frequency = <200000000>;
32 sd-uhs-sdr50;
33 sd-uhs-sdr104;
34 sd-uhs-ddr50;
61 sti-display-subsystem@0 {
[all …]
Dimx6ull-colibri-eval-v3.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 stdout-path = "serial0:115200n8";
11 gpio-keys {
12 compatible = "gpio-keys";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
17 label = "Wake-Up";
20 debounce-interval = <10>;
21 wakeup-source;
27 compatible = "fixed-clock";
[all …]
Dstih418-b2199.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
11 compatible = "st,stih418-b2199", "st,stih418";
15 stdout-path = &sbc_serial0;
29 compatible = "gpio-leds";
33 linux,default-trigger = "heartbeat";
37 default-state = "off";
70 clock-frequency = <100000>;
71 st,i2c-min-scl-pulse-width-us = <0>;
[all …]
Drk3288-phycore-rdk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec PCM-947 carrier board
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/leds-pca9532.h>
12 #include "rk3288-phycore-som.dtsi"
15 model = "Phytec RK3288 PCM-947";
16 compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
18 user_buttons: user-buttons {
19 compatible = "gpio-keys";
[all …]
Dimx6dl-colibri-v1_1-eval-v3.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 /dts-v1/;
8 #include "imx6dl-colibri-eval-v3.dts"
9 #include "imx6qdl-colibri-v1_1-uhs.dtsi"
13 compatible = "toradex,colibri_imx6dl-v1_1-eval-v3",
14 "toradex,colibri_imx6dl-v1_1",
15 "toradex,colibri_imx6dl-eval-v3",
24 * Please make sure your carrier board does not pull-up any of
26 * UHS-I support.
28 * delete no-1-8-v property (example below):
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a-clearfog-itx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
10 #include "fsl-lx2160a-cex7.dtsi"
19 stdout-path = "serial0:115200n8";
28 sd-uhs-sdr104;
29 sd-uhs-sdr50;
30 sd-uhs-sdr25;
31 sd-uhs-sdr12;
Dfsl-ls1012a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "fsl-ls1012a.dtsi"
14 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
22 sd-uhs-sdr104;
23 sd-uhs-sdr50;
24 sd-uhs-sdr25;
25 sd-uhs-sdr12;
30 mmc-hs200-1_8v;
42 compatible = "jedec,spi-nor";
[all …]
Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
21 stdout-path = "serial0:115200n8";
24 sb_3v3: regulator-sb3v3 {
25 compatible = "regulator-fixed";
26 regulator-name = "MC34717-3.3VSB";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
[all …]
Dfsl-ls1046a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
10 /dts-v1/;
12 #include "fsl-ls1046a.dtsi"
16 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
26 stdout-path = "serial0:115200n8";
39 mmc-hs200-1_8v;
40 sd-uhs-sdr104;
41 sd-uhs-sdr50;
42 sd-uhs-sdr25;
[all …]
Dfsl-ls1028a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
12 #include "fsl-ls1028a.dtsi"
16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
25 stdout-path = "serial0:115200n8";
33 sys_mclk: clock-mclk {
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <25000000>;
39 reg_1p8v: regulator-1p8v {
[all …]
Dfsl-ls1028a-kontron-sl28.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
9 /dts-v1/;
10 #include "fsl-ls1028a.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
16 model = "Kontron SMARC-sAL28";
29 compatible = "gpio-keys";
31 power-button {
[all …]
/linux-5.10/drivers/mmc/core/
Ddebugfs.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/fault-inject.h>
54 struct mmc_host *host = s->private; in mmc_ios_show()
55 struct mmc_ios *ios = &host->ios; in mmc_ios_show()
58 seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); in mmc_ios_show()
59 if (host->actual_clock) in mmc_ios_show()
60 seq_printf(s, "actual clock:\t%u Hz\n", host->actual_clock); in mmc_ios_show()
61 seq_printf(s, "vdd:\t\t%u ", ios->vdd); in mmc_ios_show()
62 if ((1 << ios->vdd) & MMC_VDD_165_195) in mmc_ios_show()
63 seq_printf(s, "(1.65 - 1.95 V)\n"); in mmc_ios_show()
[all …]
/linux-5.10/drivers/mmc/host/
Dsdhci-st.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Based on sdhci-cns3xxx.c
18 #include "sdhci-pltfm.h"
88 #define ST_TOP_MMC_DLY_FIX_OFF(x) (x - 0x8)
102 /* register to provide the phase-shift value for DLL */
119 * DLL procedure has finished before switching to ultra-speed modes.
139 * flashSS sub-system which needs to be configured to be compliant to eMMC 4.5
145 struct mmc_host *mhost = host->mmc; in st_mmcss_cconfig()
148 if (!of_device_is_compatible(np, "st,sdhci-stih407")) in st_mmcss_cconfig()
157 host->ioaddr + ST_MMC_CCONFIG_REG_1); in st_mmcss_cconfig()
[all …]
Dsdhci-pxav3.c1 // SPDX-License-Identifier: GPL-2.0-only
28 #include "sdhci-pltfm.h"
80 dev_err(&pdev->dev, "no mbus dram info\n"); in mv_conf_mbus_windows()
81 return -EINVAL; in mv_conf_mbus_windows()
86 dev_err(&pdev->dev, "cannot get mbus registers\n"); in mv_conf_mbus_windows()
87 return -EINVAL; in mv_conf_mbus_windows()
90 regs = ioremap(res->start, resource_size(res)); in mv_conf_mbus_windows()
92 dev_err(&pdev->dev, "cannot map mbus registers\n"); in mv_conf_mbus_windows()
93 return -ENOMEM; in mv_conf_mbus_windows()
101 for (i = 0; i < dram->num_cs; i++) { in mv_conf_mbus_windows()
[all …]
/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxl-s905x-libretech-cc-v2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/sound/meson-aiu.h>
13 #include "meson-gxl-s905x.dtsi"
16 compatible = "libretech,aml-s905x-cc-v2", "amlogic,s905x",
17 "amlogic,meson-gxl";
18 model = "Libre Computer AML-S905X-CC V2";
27 stdout-path = "serial0:115200n8";
[all …]
/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3308-roc-cc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Firefly ROC-RK3308-CC board";
11 compatible = "firefly,roc-rk3308-cc", "rockchip,rk3308";
13 stdout-path = "serial2:1500000n8";
17 compatible = "gpio-ir-receiver";
19 pinctrl-names = "default";
20 pinctrl-0 = <&ir_recv_pin>;
24 compatible = "pwm-ir-tx";
29 compatible = "gpio-leds";
[all …]

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