Lines Matching +full:uhs +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
9 * Based on sdhci-cns3xxx.c
18 #include "sdhci-pltfm.h"
88 #define ST_TOP_MMC_DLY_FIX_OFF(x) (x - 0x8)
102 /* register to provide the phase-shift value for DLL */
119 * DLL procedure has finished before switching to ultra-speed modes.
139 * flashSS sub-system which needs to be configured to be compliant to eMMC 4.5
145 struct mmc_host *mhost = host->mmc; in st_mmcss_cconfig()
148 if (!of_device_is_compatible(np, "st,sdhci-stih407")) in st_mmcss_cconfig()
157 host->ioaddr + ST_MMC_CCONFIG_REG_1); in st_mmcss_cconfig()
159 /* Set clock frequency, default to 50MHz if max-frequency is not in st_mmcss_cconfig()
162 switch (mhost->f_max) { in st_mmcss_cconfig()
164 clk_set_rate(pltfm_host->clk, mhost->f_max); in st_mmcss_cconfig()
168 clk_set_rate(pltfm_host->clk, mhost->f_max); in st_mmcss_cconfig()
172 clk_set_rate(pltfm_host->clk, 50000000); in st_mmcss_cconfig()
176 writel_relaxed(cconf2, host->ioaddr + ST_MMC_CCONFIG_REG_2); in st_mmcss_cconfig()
183 host->ioaddr + ST_MMC_GP_OUTPUT); in st_mmcss_cconfig()
185 if (mhost->caps & MMC_CAP_UHS_SDR50) { in st_mmcss_cconfig()
195 if (mhost->caps & MMC_CAP_UHS_SDR104) { in st_mmcss_cconfig()
206 if (mhost->caps & MMC_CAP_UHS_DDR50) in st_mmcss_cconfig()
209 writel_relaxed(cconf3, host->ioaddr + ST_MMC_CCONFIG_REG_3); in st_mmcss_cconfig()
210 writel_relaxed(cconf4, host->ioaddr + ST_MMC_CCONFIG_REG_4); in st_mmcss_cconfig()
211 writel_relaxed(cconf5, host->ioaddr + ST_MMC_CCONFIG_REG_5); in st_mmcss_cconfig()
239 return -EBUSY; in st_mmcss_lock_dll()
248 if (host->clock > CLK_TO_CHECK_DLL_LOCK) { in sdhci_st_set_dll_for_clock()
249 st_mmcss_set_dll(pdata->top_ioaddr); in sdhci_st_set_dll_for_clock()
250 ret = st_mmcss_lock_dll(host->ioaddr); in sdhci_st_set_dll_for_clock()
257 unsigned int uhs) in sdhci_st_set_uhs_signaling() argument
266 switch (uhs) { in sdhci_st_set_uhs_signaling()
268 * Set V18_EN -- UHS modes do not work without this. in sdhci_st_set_uhs_signaling()
273 st_mmcss_set_static_delay(pdata->top_ioaddr); in sdhci_st_set_uhs_signaling()
277 st_mmcss_set_static_delay(pdata->top_ioaddr); in sdhci_st_set_uhs_signaling()
281 st_mmcss_set_static_delay(pdata->top_ioaddr); in sdhci_st_set_uhs_signaling()
287 st_mmcss_set_static_delay(pdata->top_ioaddr); in sdhci_st_set_uhs_signaling()
293 st_mmcss_set_static_delay(pdata->top_ioaddr); in sdhci_st_set_uhs_signaling()
299 dev_warn(mmc_dev(host->mmc), "Error setting dll for clock " in sdhci_st_set_uhs_signaling()
300 "(uhs %d)\n", uhs); in sdhci_st_set_uhs_signaling()
302 dev_dbg(mmc_dev(host->mmc), "uhs %d, ctrl_2 %04X\n", uhs, ctrl_2); in sdhci_st_set_uhs_signaling()
313 ret = readl_relaxed(host->ioaddr + reg); in sdhci_st_readl()
318 ret = readl_relaxed(host->ioaddr + reg); in sdhci_st_readl()
344 struct device_node *np = pdev->dev.of_node; in sdhci_st_probe()
354 clk = devm_clk_get(&pdev->dev, "mmc"); in sdhci_st_probe()
356 dev_err(&pdev->dev, "Peripheral clk not found\n"); in sdhci_st_probe()
361 icnclk = devm_clk_get(&pdev->dev, "icn"); in sdhci_st_probe()
365 rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); in sdhci_st_probe()
373 dev_err(&pdev->dev, "Failed sdhci_pltfm_init\n"); in sdhci_st_probe()
380 pdata->rstc = rstc; in sdhci_st_probe()
382 ret = mmc_of_parse(host->mmc); in sdhci_st_probe()
384 dev_err(&pdev->dev, "Failed mmc_of_parse\n"); in sdhci_st_probe()
390 dev_err(&pdev->dev, "Failed to prepare clock\n"); in sdhci_st_probe()
396 dev_err(&pdev->dev, "Failed to prepare icn clock\n"); in sdhci_st_probe()
402 "top-mmc-delay"); in sdhci_st_probe()
403 pdata->top_ioaddr = devm_ioremap_resource(&pdev->dev, res); in sdhci_st_probe()
404 if (IS_ERR(pdata->top_ioaddr)) { in sdhci_st_probe()
405 dev_warn(&pdev->dev, "FlashSS Top Dly registers not available"); in sdhci_st_probe()
406 pdata->top_ioaddr = NULL; in sdhci_st_probe()
409 pltfm_host->clk = clk; in sdhci_st_probe()
410 pdata->icnclk = icnclk; in sdhci_st_probe()
419 host_version = readw_relaxed((host->ioaddr + SDHCI_HOST_VERSION)); in sdhci_st_probe()
421 dev_info(&pdev->dev, "SDHCI ST Initialised: Host Version: 0x%x Vendor Version 0x%x\n", in sdhci_st_probe()
446 struct reset_control *rstc = pdata->rstc; in sdhci_st_remove()
451 clk_disable_unprepare(pdata->icnclk); in sdhci_st_remove()
467 if (host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_st_suspend()
468 mmc_retune_needed(host->mmc); in sdhci_st_suspend()
474 if (pdata->rstc) in sdhci_st_suspend()
475 reset_control_assert(pdata->rstc); in sdhci_st_suspend()
477 clk_disable_unprepare(pdata->icnclk); in sdhci_st_suspend()
478 clk_disable_unprepare(pltfm_host->clk); in sdhci_st_suspend()
488 struct device_node *np = dev->of_node; in sdhci_st_resume()
491 ret = clk_prepare_enable(pltfm_host->clk); in sdhci_st_resume()
495 ret = clk_prepare_enable(pdata->icnclk); in sdhci_st_resume()
497 clk_disable_unprepare(pltfm_host->clk); in sdhci_st_resume()
501 if (pdata->rstc) in sdhci_st_resume()
502 reset_control_deassert(pdata->rstc); in sdhci_st_resume()
523 .name = "sdhci-st",
535 MODULE_ALIAS("platform:sdhci-st");