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/linux-6.8/Documentation/userspace-api/media/v4l/
Dpixfmt-yuv-planar.rst102 - 64x32 tiles
111 - 16x16 tiles
125 - 4x4 tiles
146 - 4x4 tiles
312 pixels in 2D 16x16 tiles, and stores tiles linearly in memory.
317 pixels in 2D 64x32 tiles, and stores 2x2 groups of tiles in
321 If the vertical resolution is an odd number of tiles, the last row of
322 tiles is stored in linear order. The layouts of the luma and chroma
325 ``V4L2_PIX_FMT_NV12_4L4`` stores pixels in 4x4 tiles, and stores
326 tiles linearly in memory. The line stride and image height must be
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/linux-6.8/Documentation/devicetree/bindings/arm/
Darm,integrator.yaml14 They are ARMv4, ARMv5 and ARMv6-capable using different core tiles,
15 so the system is modular and can host a variety of CPU tiles called
16 "core tiles" and referred to in the device tree as "core modules".
Darm,vexpress-juno.yaml18 The board consist of a motherboard and one or more daughterboards (tiles). The
20 tiles.
130 description: When describing tiles consisting of more than one DCC, its
139 the connection between the motherboard and any tiles. Sometimes the
/linux-6.8/drivers/gpu/drm/xe/
Dxe_device.h54 return &xe->tiles[0]; in xe_device_get_root_tile()
85 gt = xe->tiles[gt_id].primary_gt; in xe_device_get_gt()
121 for_each_if((tile__) = &(xe__)->tiles[(id__)])
125 for_each_if((tile__) = &(xe__)->tiles[(id__)])
Dxe_device_types.h114 * at the root tile, and the MSTR_TILE_INTR register will report which tiles
171 * still be accessed by all tiles' GTs.
242 /** @tile_count: Number of tiles */
365 /** @tiles: device tiles */
366 struct xe_tile tiles[XE_MAX_TILES_PER_DEVICE]; member
Dxe_tile.c28 * tiles together in a way such that interrupt notifications from remote tiles
Dxe_tile_sysfs_types.h17 * When dealing with multiple TILEs, this struct helps to understand which
/linux-6.8/include/uapi/drm/
Ddrm_fourcc.h505 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
522 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
540 * This is a tiled layout using 4Kb tiles in row-major layout.
541 * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
561 * considered to be made up of normal 128Bx32 Y tiles, Thus
576 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
587 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
610 * corresponds to an area of 4x1 tiles in the main surface. The main surface
618 * This is a tiled layout using 4KB tiles in a row-major layout. It has the same
666 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
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/linux-6.8/drivers/gpu/drm/imagination/
Dpvr_rogue_cr_defs_client.h103 * must be configured in terms of the number of tiles in X & Y axis.
123 * as the number of tiles defined in the RGX_CR_TE_SCREEN register.
143 * Macrotile width, in tiles. A value of zero corresponds to the maximum size
150 * Macrotile height, in tiles. A value of zero corresponds to the maximum size
/linux-6.8/drivers/video/fbdev/core/
DKconfig199 where the screen is divided into rectangular sections (tiles), whereas
202 parameters in terms of number of tiles instead of number of pixels.
206 terms of number of tiles in the x- and y-axis.
/linux-6.8/include/linux/
Dfb.h320 __u32 length; /* number of tiles in the map */
328 __u32 width; /* number of tiles in the x-axis */
329 __u32 height; /* number of tiles in the y-axis */
341 __u32 width; /* number of tiles in the x-axis */
342 __u32 height; /* number of tiles in the y-axis */
348 __u32 width; /* number of tiles in the x-axis */
349 __u32 height; /* number of tiles in the y-axis */
352 __u32 length; /* number of tiles to draw */
369 /* all dimensions from hereon are in terms of tiles */
371 /* move a rectangular region of tiles from one area to another*/
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/linux-6.8/Documentation/admin-guide/perf/
Dthunderx2-pmu.rst9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles.
11 to the total number of channels/tiles.
/linux-6.8/drivers/gpu/drm/xe/display/
Dxe_fb_pin.c40 /* The DE ignores the PTEs for the padding tiles */ in write_dpt_rotated()
71 /* The DE ignores the PTEs for the padding tiles */ in write_dpt_remapped()
95 /* display uses 4K tiles instead of bytes here, convert to entries.. */ in __xe_pin_fb_vma_dpt()
175 /* The DE ignores the PTEs for the padding tiles */ in write_ggtt_rotated()
222 /* display seems to use tiles instead of bytes here, so convert it back.. */ in __xe_pin_fb_vma_ggtt()
/linux-6.8/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dnv25.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv25_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv25_fb_tile_comp()
Dnv35.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv35_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv35_fb_tile_comp()
Dnv36.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv36_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv36_fb_tile_comp()
Dnv40.c33 u32 tiles = DIV_ROUND_UP(size, 0x80); in nv40_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x100); in nv40_fb_tile_comp()
Dnv20.c46 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv20_fb_tile_comp() local
47 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv20_fb_tile_comp()
Dnv30.c52 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv30_fb_tile_comp() local
53 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv30_fb_tile_comp()
/linux-6.8/drivers/media/platform/mediatek/vcodec/decoder/vdec/
Dvdec_vp9_req_lat_if.c276 struct vdec_vp9_slice_tiles tiles; member
888 struct vdec_vp9_slice_tiles *tiles; in vdec_vp9_slice_setup_tile() local
898 tiles = &vsi->frame.tiles; in vdec_vp9_slice_setup_tile()
899 tiles->actual_rows = 0; in vdec_vp9_slice_setup_tile()
912 tiles->mi_rows[i] = (offset + 7) >> 3; in vdec_vp9_slice_setup_tile()
913 if (tiles->mi_rows[i]) in vdec_vp9_slice_setup_tile()
914 tiles->actual_rows++; in vdec_vp9_slice_setup_tile()
921 tiles->mi_cols[i] = (offset + 7) >> 3; in vdec_vp9_slice_setup_tile()
1059 * parse tiles according to `6.4 Decode tiles syntax`
1062 * frame contains uncompress header, compressed header and several tiles.
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/linux-6.8/drivers/gpu/drm/i915/display/
Dintel_fb.c49 * main surface. And each 64B CCS cache line represents an area of 4x1 Y-tiles
929 unsigned int tiles; in intel_adjust_tile_offset() local
935 tiles = (old_offset - new_offset) / tile_size; in intel_adjust_tile_offset()
937 *y += tiles / pitch_tiles * tile_height; in intel_adjust_tile_offset()
938 *x += tiles % pitch_tiles * tile_width; in intel_adjust_tile_offset()
1040 unsigned int tile_rows, tiles, pitch_tiles; in intel_compute_aligned_offset() local
1055 tiles = *x / tile_width; in intel_compute_aligned_offset()
1058 offset = (tile_rows * pitch_tiles + tiles) * tile_size; in intel_compute_aligned_offset()
1368 * of 8 main surface tiles. in plane_view_dst_stride_tiles()
1561 /* Return number of tiles @color_plane needs. */
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/linux-6.8/drivers/gpu/ipu-v3/
Dipu-image-convert.c27 * of 4*4 or 16 tiles. A conversion is then carried out for each
34 * of tiles as the output frame:
62 * output image. Tiles are numbered row major from top left to bottom
347 "task %u: ctx %p: %s format: %dx%d (%dx%d tiles), %c%c%c%c\n", in dump_format()
403 * Calculate downsizing coefficients, which are the same for all tiles,
406 * Also determine the number of tiles necessary to guarantee that no tile
462 "%s: hscale: >>%u, *8192/%u vscale: >>%u, *8192/%u, %ux%u tiles\n", in calc_image_resize_coefficients()
540 * Output tiles must start at a multiple of 8 bytes horizontally and in find_best_seam()
552 * Tiles in the right row / bottom column may not be allowed to in find_best_seam()
661 * Fill in left position and width and for all tiles in an input column, and
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/linux-6.8/arch/arm/include/debug/
Dvexpress.S28 @ - all other (RS1 complaint) tiles use UART mapped
/linux-6.8/drivers/video/fbdev/
Dgbefb.c688 The GBE hardware uses a tiled memory to screen mapping. Tiles are in gbefb_set_par()
691 tiles on the right and/or bottom of the screen if needed. in gbefb_set_par()
709 Tiles have the advantage that they can be allocated individually in in gbefb_set_par()
715 Tiles are still allocated as independent chunks of 64KB of in gbefb_set_par()
750 /* Tell gbe about the tiles table location */ in gbefb_set_par()
1158 printk(KERN_ERR "gbefb: couldn't allocate tiles table\n"); in gbefb_probe()
1192 /* map framebuffer memory into tiles table */ in gbefb_probe()
/linux-6.8/drivers/gpu/drm/
Ddrm_client_modeset.c419 /* if this tile_pass doesn't cover any of the tiles - keep going */ in drm_client_target_preferred()
424 * all tiles left and above in drm_client_target_preferred()
445 * In case of tiled mode if all tiles not present fallback to in drm_client_target_preferred()
447 * After all tiles are present, try to find the tiled mode in drm_client_target_preferred()
450 * tile 0,0 and set to no mode for all other tiles. in drm_client_target_preferred()
708 * In case of tiled modes, if all tiles are not present in drm_client_firmware_config()

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