| /qemu/docs/system/ |
| H A D | target-mips.rst | 1 .. _MIPS-System-emulator:
3 MIPS System emulator
7 endian options, ``qemu-system-mips``, ``qemu-system-mipsel``
8 ``qemu-system-mips64`` and ``qemu-system-mips64el``. Five different
22 - Core board with MIPS 24Kf CPU and Galileo system controller
67 - Bonito64 system controller as North Bridge
94 .. _nanoMIPS-System-emulator:
96 nanoMIPS System emulator
99 Executable ``qemu-system-mipsel`` also covers simulation of 32-bit
100 nanoMIPS system in little endian mode:
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| H A D | target-riscv.rst | 1 .. _RISC-V-System-emulator:
3 RISC-V System emulator
7 ``qemu-system-riscv64`` executable to simulate a 64-bit RISC-V machine,
8 ``qemu-system-riscv32`` executable to simulate a 32-bit RISC-V machine.
13 CPUs are generally built into "system-on-chip" (SoC) designs created by
25 For QEMU's RISC-V system emulation, you must specify which board
30 operating system or firmware images intended to run on one machine
32 users who are used to the x86 world where every system looks like a
36 If you already have a system image or a kernel that works on hardware
41 extract the file system and use that with a different kernel which
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| H A D | target-arm.rst | 1 .. _ARM-System-emulator:
3 Arm System emulator
7 ``qemu-system-aarch64`` executable to simulate a 64-bit Arm machine.
8 You can use either ``qemu-system-arm`` or ``qemu-system-aarch64``
10 work for ``qemu-system-arm`` will behave the same when used with
11 ``qemu-system-aarch64``.
16 are generally built into "system-on-chip" (SoC) designs created by
35 For QEMU's Arm system emulation, you must specify which board
40 operating system or firmware images intended to run on one machine
42 users who are used to the x86 world where every system looks like a
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| H A D | target-avr.rst | 1 .. _AVR-System-emulator:
3 AVR System emulator
6 Use the executable ``qemu-system-avr`` to emulate a AVR 8 bit based machine.
22 qemu-system-avr -machine mega2560 -bios demo.elf
26 qemu-system-avr -M mega2560 -bios demo.elf -nographic \
35 qemu-system-avr -machine mega2560 -bios demo.elf -s -S
48 qemu-system-avr -machine mega2560 -bios demo.elf -d in_asm
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| H A D | target-rx.rst | 1 .. _RX-System-emulator:
3 RX System emulator
6 Use the executable ``qemu-system-rx`` to simulate RX target (GDB simulator).
19 Example of ``qemu-system-rx`` usage for RX is shown below:
25 qemu-system-rx -M gdbsim-r5f562n8 -bios <u-boot_image_file>
34 qemu-system-rx -M gdbsim-r5f562n8 \
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| H A D | target-openrisc.rst | 1 .. _OpenRISC-System-emulator:
3 OpenRISC System emulator
6 QEMU can emulate 32-bit OpenRISC CPUs using the ``qemu-system-or1k`` executable.
8 OpenRISC CPUs are generally built into "system-on-chip" (SoC) designs that run
20 For QEMU's OpenRISC system emulation, you must specify which board model you
32 If you already have a system image or a kernel that works on hardware and you
37 different kernel which boots on a system that QEMU does emulate.)
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| H A D | introduction.rst | 9 QEMU's system emulation provides a virtual model of a machine (CPU,
42 System emulation provides a wide range of device models to emulate
57 The flexible ``chardev`` system allows for handling IO from character
62 dynamically add and remove devices as well as introspect the system
72 system software images.
82 For a non-x86 system where we emulate a broad range of machine types,
85 the :ref:`system-targets-ref` section of the manual.
147 - How the system is displayed, how it is managed and controlled or
150 - How the system boots, via firmware or direct kernel boot.
160 $ qemu-system-aarch64 \
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| /qemu/.gitlab-ci.d/ |
| H A D | buildtest.yml | 4 build-system-alpine:
16 check-system-alpine:
19 - job: build-system-alpine
25 functional-system-alpine:
28 - job: build-system-alpine
34 build-system-ubuntu:
46 check-system-ubuntu:
49 - job: build-system-ubuntu
55 functional-system-ubuntu:
58 - job: build-system-ubuntu
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| /qemu/docs/about/ |
| H A D | emulation.rst | 6 :ref:`System Emulation` and :ref:`User Mode Emulation` are supported
14 - System
22 - :ref:`Yes<ARM-System-emulator>`
26 - :ref:`Yes<AVR-System-emulator>`
36 - A legacy RISC system used in HP's old minicomputers
38 - :ref:`Yes<QEMU-PC-System-emulator>`
46 - :ref:`Yes<ColdFire-System-emulator>`
54 - :ref:`Yes<MIPS-System-emulator>`
58 - :ref:`Yes<OpenRISC-System-emulator>`
62 - :ref:`Yes<PowerPC-System-emulator>`
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| /qemu/target/loongarch/ |
| H A D | README | 12 - System emulation
14 …You can reference docs/system/loongarch/loongson3.rst to get the information about system emulatio…
23 see System emulation.
33 3. Run LoongArch system basic command with loongarch-clfs-system.
37 …://github.com/loongson/build-tools/releases/download/2022.05.29/loongarch64-clfs-system-5.0.tar.bz2
39 tar -vxf loongarch64-clfs-system-5.0.tar.bz2 -C /opt/clfs
45 - Run LoongArch system basic command.
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| /qemu/docs/system/devices/ |
| H A D | can.rst | 6 can be connected to host system CAN API (at this time only Linux
43 Add "can-host-socketcan" object to connect device to host system CAN bus::
66 Example for qemu-system-x86_64::
68 qemu-system-x86_64 -accel kvm -kernel /boot/vmlinuz-4.9.0-4-amd64 \
76 Example for qemu-system-arm::
78 qemu-system-arm -cpu arm1176 -m 256 -M versatilepb \
88 The CAN interface of the host system has to be configured for proper
117 Linux system (SocketCAN used) and to both CTU CAN FD cores emulated
118 on the corresponding PCI card expects that host system CAN bus
121 qemu-system-x86_64 -enable-kvm -kernel /boot/vmlinuz-4.19.52+ \
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| /qemu/docs/devel/ |
| H A D | s390-dasd-ipl.rst | 32 IPL2 is to find and load either the operating system or a small program that
33 loads the operating system from disk. At the end of this step all or some of
34 the real operating system is loaded into memory and we are ready to hand
35 control over to the guest operating system. At this point the guest
36 operating system is entirely responsible for loading any more data it might
42 address points to the guest operating system code to execute at the end of
47 4. Start executing the guest operating system.
49 should contain the needed flags for the operating system we have loaded. The
51 to start executing the operating system. This psw is loaded (via LPSW
52 instruction) causing control to be passed to the operating system code.
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| H A D | build-system.rst | 2 The QEMU build system architecture
6 QEMU build system. As with projects using GNU autotools, the QEMU build
7 system has two stages; first the developer runs the "configure" script
58 Almost all QEMU developers that need to modify the build system will
101 Attempt to compile a test program with the system C compiler using
106 Attempt to compile a test program with the system C compiler using
107 $CFLAGS and link it with the system linker using $LDFLAGS. The test
111 Determine if the macro $NAME is defined by the system C compiler.
131 from the environment, or the system PATH, in this order. The venv resides
196 The Meson build system describes the build and install process for:
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| /qemu/gdbstub/ |
| H A D | internals.h | 105 * Connection helpers for both system and user backends
116 * between user and system mode, mainly to deal with the differences
126 * system stub always returns true.
136 bool gdb_can_reverse(void); /* system emulation, stub for user */
141 /* signal mapping, common for system, specialised for user-mode */
158 * Helpers with separate system and user implementations
163 * Command handlers - either specialised or system or user only
167 void gdb_handle_query_rcmd(GArray *params, void *ctx); /* system */
183 /* system only */
193 /* user/system specific syscall handling */
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| /qemu/include/hw/timer/ |
| H A D | sse-counter.h | 2 * Arm SSE Subsystem System Counter
13 * This is a model of the "System counter" which is documented in
22 * Consumers of the system counter's timestamp, such as the SSE
23 * System Timer device, can also use the APIs sse_counter_for_timestamp(),
25 * interact with an instance of the System Counter. Generally the
27 * code can set to the appropriate instance of the system counter.
65 * the system timestamp (such as the SSE system timer device)
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| /qemu/docs/system/arm/ |
| H A D | sbsa.rst | 1 Arm Server Base System Architecture Reference board (``sbsa-ref``)
9 - `Base System Architecture <https://developer.arm.com/documentation/den0094/>`__ (BSA)
10 - `Server Base System Architecture <https://developer.arm.com/documentation/den0029/>`__ (SBSA)
13 specification defines how the firmware reports that to any operating system.
25 - System bus AHCI controller
26 - System bus XHCI controller
36 ``sbsa-ref`` is a static system that reports a very minimal devicetree to the
37 firmware for non-discoverable information about system components. This
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| /qemu/docs/system/ppc/ |
| H A D | ppce500.rst | 31 the various devices in the system.
39 Both ``qemu-system-ppc`` and ``qemu-system-ppc64`` provide emulation for the
45 Additionally ``qemu-system-ppc64`` provides support for the following 64-bit
57 $ qemu-system-ppc64 -nographic -M ppce500 -cpu e6500
103 $ qemu-system-ppc64 -M ppce500 -cpu e5500 -smp 4 -m 2G \
117 $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \
158 $ qemu-system-ppc64 -M ppce500 -smp 4 -m 2G \
170 Root file system on flash drive
173 Rather than using a root file system on ram disk, it is possible to have it on
179 $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \
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| /qemu/hw/9pfs/ |
| H A D | 9p-posix-acl.c | 2 * 9p system.posix* xattr callback
25 #define MAP_ACL_ACCESS "user.virtfs.system.posix_acl_access"
26 #define MAP_ACL_DEFAULT "user.virtfs.system.posix_acl_default"
27 #define ACL_ACCESS "system.posix_acl_access"
28 #define ACL_DEFAULT "system.posix_acl_default"
140 .name = "system.posix_acl_access",
148 .name = "system.posix_acl_default",
156 .name = "system.posix_acl_",
164 .name = "system.posix_acl_",
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| /qemu/include/hw/misc/ |
| H A D | iotkit-sysctl.h | 2 * ARM IoTKit system control element
13 * This is a model of the "system control element" which is part of the
16 * Specifically, it implements the "system information block" and
17 * "system control register" blocks.
22 * + sysbus MMIO region 0: the system information register bank
23 * + sysbus MMIO region 1: the system control register bank
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| /qemu/gdb-xml/ |
| H A D | s390-virt-kvm.xml | 8 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
10 <reg name="pp" bitsize="64" type="uint64" group="system"/>
11 <reg name="pfault_token" bitsize="64" type="uint64" group="system"/>
12 <reg name="pfault_select" bitsize="64" type="uint64" group="system"/>
13 <reg name="pfault_compare" bitsize="64" type="uint64" group="system"/>
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| H A D | s390-virt.xml | 8 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
10 <reg name="ckc" bitsize="64" type="uint64" group="system"/>
11 <reg name="cputm" bitsize="64" type="uint64" group="system"/>
12 <reg name="last_break" bitsize="64" type="code_ptr" group="system"/>
13 <reg name="prefix" bitsize="64" type="data_ptr" group="system"/>
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| H A D | s390-gs.xml | 8 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
10 <reg name="gs_reserved" bitsize="64" type="uint64" group="system"/>
11 <reg name="gsd" bitsize="64" type="uint64" group="system"/>
12 <reg name="gssm" bitsize="64" type="uint64" group="system"/>
13 <reg name="gsepla" bitsize="64" type="data_ptr" group="system"/>
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| /qemu/tests/multiboot/ |
| H A D | aout_kludge.out | 22 qemu-system-x86_64: invalid load_addr address
27 qemu-system-x86_64: invalid load_end_addr address
32 qemu-system-x86_64: invalid header_addr address
37 qemu-system-x86_64: invalid bss_end_addr address
42 qemu-system-x86_64: kernel does not fit in address space
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| /qemu/ |
| H A D | MAINTAINERS | 24 Q: Patchwork web based patch tracking system site
34 it has been replaced by a better system and you
122 F: docs/system/target-s390x.rst
123 F: docs/system/s390x/
133 F: docs/system/target-mips.rst
143 F: docs/system/target-i386*
155 F: system/watchpoint.c
170 F: include/system/tcg.h
205 F: docs/system/target-arm.rst
206 F: docs/system/arm/cpu-features.rst
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| /qemu/include/hw/watchdog/ |
| H A D | cmsdk-apb-watchdog.h | 14 * System Design Kit (CMSDK) and documented in the Cortex-M System
16 * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
26 * secure code can control whether non-secure code can perform a system
|