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/linux/tools/testing/radix-tree/
H A Dmaple.c762 #define STORE 1 macro
766 (((x) == STORE) ? \
767 "STORE" : \
807 } else { /* !null_entry (store) */ in mas_ce2_over_count()
838 * @*range_min: Pointer to store the minimum range of the offset
839 * @*range_max: Pointer to store the maximum range of the offset
909 * @*range_min: A pointer to store the minimum of the range
910 * @*range_max: A pointer to store the maximum of the range
1056 case STORE: in check_erase2_testset()
1160 STORE, 14073748834713 in check_erase2_sets()
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/linux/kernel/
H A Dstacktrace.c76 unsigned long *store; member
93 c->store[c->len++] = addr; in stack_trace_consume_entry()
106 * @store: Pointer to storage array
112 unsigned int stack_trace_save(unsigned long *store, unsigned int size, in stack_trace_save() argument
117 .store = store, in stack_trace_save()
130 * @store: Pointer to storage array
136 unsigned int stack_trace_save_tsk(struct task_struct *tsk, unsigned long *store, in stack_trace_save_tsk() argument
141 .store = store, in stack_trace_save_tsk()
165 stack_trace_save_regs(struct pt_regs * regs,unsigned long * store,unsigned int size,unsigned int skipnr) stack_trace_save_regs() argument
192 stack_trace_save_tsk_reliable(struct task_struct * tsk,unsigned long * store,unsigned int size) stack_trace_save_tsk_reliable() argument
223 stack_trace_save_user(unsigned long * store,unsigned int size) stack_trace_save_user() argument
268 stack_trace_save(unsigned long * store,unsigned int size,unsigned int skipnr) stack_trace_save() argument
292 stack_trace_save_tsk(struct task_struct * task,unsigned long * store,unsigned int size,unsigned int skipnr) stack_trace_save_tsk() argument
316 stack_trace_save_regs(struct pt_regs * regs,unsigned long * store,unsigned int size,unsigned int skipnr) stack_trace_save_regs() argument
342 stack_trace_save_tsk_reliable(struct task_struct * tsk,unsigned long * store,unsigned int size) stack_trace_save_tsk_reliable() argument
363 stack_trace_save_user(unsigned long * store,unsigned int size) stack_trace_save_user() argument
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/linux/arch/sparc/lib/
H A DM7memcpy.S48 * load words, shift half words, store words; branch to finish_up
50 * load words, shift 3 bytes, store words; branch to finish_up
52 * load words, shift 1 byte, store words; branch to finish_up
65 * Use BIS (block initializing store) to avoid copying store cache
66 * lines from memory. But pre-store first element of each cache line
83 * loadx8, falign, block-store, prefetch loop
84 * (only use block-init-store when src/dst on 8 byte boundaries.)
120 #ifndef STORE
121 #define STORE(typ macro
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H A Dcsum_copy.S31 #ifndef STORE
32 #define STORE(type,src,addr) type src, [addr] macro
53 EX_ST(STORE(stb, %o4, %o1 + 0x00))
63 EX_ST(STORE(sth, %o5, %o1 + 0x00))
112 EX_ST(STORE(stw, %o5, %o1 + 0x00))
115 EX_ST(STORE(stw, %g1, %o1 + 0x04))
118 EX_ST(STORE(stw, %g2, %o1 + 0x08))
121 EX_ST(STORE(stw, %o5, %o1 + 0x0c))
124 EX_ST(STORE(stw, %g1, %o1 + 0x10))
127 EX_ST(STORE(st
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H A DNG4memcpy.S69 #ifndef STORE
71 #define STORE(type,src,addr) type src, [addr] macro
73 #define STORE(type,src,addr) type##a src, [addr] %asi macro
135 EX_ST(STORE(stb, %g2, %o0 - 0x01), memcpy_retl_o2_plus_g1_plus_1)
165 EX_ST(STORE(stx, %g2, %o0 - 0x08), memcpy_retl_o2_plus_g1_plus_8)
241 EX_ST_FP(STORE(std, %f16, %o0 + 0x00), memcpy_retl_o2_plus_o4_plus_64)
242 EX_ST_FP(STORE(std, %f18, %o0 + 0x08), memcpy_retl_o2_plus_o4_plus_56)
243 EX_ST_FP(STORE(std, %f20, %o0 + 0x10), memcpy_retl_o2_plus_o4_plus_48)
244 EX_ST_FP(STORE(std, %f22, %o0 + 0x18), memcpy_retl_o2_plus_o4_plus_40)
245 EX_ST_FP(STORE(st
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/linux/drivers/md/
H A Ddm-exception-store.c9 #include "dm-exception-store.h"
65 * 'dm-exception-store-<type_name>' is too long of a name in my
67 * containing exception store implementations be 'dm-exstore-<type_name>'.
143 static int set_chunk_size(struct dm_exception_store *store, in set_chunk_size() argument
154 store->chunk_size = store->chunk_mask = store->chunk_shift = 0; in set_chunk_size()
158 return dm_exception_store_set_chunk_size(store, chunk_size, error); in set_chunk_size()
161 int dm_exception_store_set_chunk_size(struct dm_exception_store *store, in dm_exception_store_set_chunk_size() argument
173 (bdev_logical_block_size(dm_snap_cow(store in dm_exception_store_set_chunk_size()
195 dm_exception_store_create(struct dm_target * ti,int argc,char ** argv,struct dm_snapshot * snap,unsigned int * args_used,struct dm_exception_store ** store) dm_exception_store_create() argument
255 dm_exception_store_destroy(struct dm_exception_store * store) dm_exception_store_destroy() argument
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H A Ddm-snap-transient.c9 #include "dm-exception-store.h"
22 * Implementation of the store for non-persistent snapshots.
29 static void transient_dtr(struct dm_exception_store *store) in transient_dtr() argument
31 kfree(store->context); in transient_dtr()
34 static int transient_read_metadata(struct dm_exception_store *store, in transient_read_metadata() argument
42 static int transient_prepare_exception(struct dm_exception_store *store, in transient_prepare_exception() argument
45 struct transient_c *tc = store->context; in transient_prepare_exception()
46 sector_t size = get_dev_size(dm_snap_cow(store->snap)->bdev); in transient_prepare_exception()
48 if (size < (tc->next_free + store->chunk_size)) in transient_prepare_exception()
51 e->new_chunk = sector_to_chunk(store, t in transient_prepare_exception()
57 transient_commit_exception(struct dm_exception_store * store,struct dm_exception * e,int valid,void (* callback)(void *,int success),void * callback_context) transient_commit_exception() argument
66 transient_usage(struct dm_exception_store * store,sector_t * total_sectors,sector_t * sectors_allocated,sector_t * metadata_sectors) transient_usage() argument
76 transient_ctr(struct dm_exception_store * store,char * options) transient_ctr() argument
90 transient_status(struct dm_exception_store * store,status_type_t status,char * result,unsigned int maxlen) transient_status() argument
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H A Ddm-snap-persistent.c9 #include "dm-exception-store.h"
33 * We need to store a record of which parts of the origin have
36 * of the COW store. It makes sense therefore, to store the
103 * The top level structure for a persistent exception store.
106 struct dm_exception_store *store; member
142 * the exception store because chunks can be committed out of
175 len = ps->store->chunk_size << SECTOR_SHIFT; in alloc_area()
236 .bdev = dm_snap_cow(ps->store->snap)->bdev, in chunk_io()
237 .sector = ps->store in chunk_io()
568 get_info(struct dm_exception_store * store) get_info() argument
573 persistent_usage(struct dm_exception_store * store,sector_t * total_sectors,sector_t * sectors_allocated,sector_t * metadata_sectors) persistent_usage() argument
592 persistent_dtr(struct dm_exception_store * store) persistent_dtr() argument
609 persistent_read_metadata(struct dm_exception_store * store,int (* callback)(void * callback_context,chunk_t old,chunk_t new),void * callback_context) persistent_read_metadata() argument
674 persistent_prepare_exception(struct dm_exception_store * store,struct dm_exception * e) persistent_prepare_exception() argument
697 persistent_commit_exception(struct dm_exception_store * store,struct dm_exception * e,int valid,void (* callback)(void *,int success),void * callback_context) persistent_commit_exception() argument
763 persistent_prepare_merge(struct dm_exception_store * store,chunk_t * last_old_chunk,chunk_t * last_new_chunk) persistent_prepare_merge() argument
809 persistent_commit_merge(struct dm_exception_store * store,int nr_merged) persistent_commit_merge() argument
842 persistent_drop_snapshot(struct dm_exception_store * store) persistent_drop_snapshot() argument
851 persistent_ctr(struct dm_exception_store * store,char * options) persistent_ctr() argument
905 persistent_status(struct dm_exception_store * store,status_type_t status,char * result,unsigned int maxlen) persistent_status() argument
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H A Ddm-exception-store.h6 * Device-mapper snapshot exception store.
47 int (*ctr)(struct dm_exception_store *store, char *options);
52 void (*dtr)(struct dm_exception_store *store);
59 int (*read_metadata)(struct dm_exception_store *store,
65 * Find somewhere to store the next exception.
67 int (*prepare_exception)(struct dm_exception_store *store,
73 void (*commit_exception)(struct dm_exception_store *store,
79 * Returns 0 if the exception store is empty.
86 int (*prepare_merge)(struct dm_exception_store *store,
93 int (*commit_merge)(struct dm_exception_store *store, in
175 sector_to_chunk(struct dm_exception_store * store,sector_t sector) sector_to_chunk() argument
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/linux/tools/perf/ui/gtk/
H A Dhists.c97 static void perf_gtk__add_callchain_flat(struct rb_root *root, GtkTreeStore *store, in perf_gtk__add_callchain_flat() argument
119 gtk_tree_store_append(store, &iter, &new_parent); in perf_gtk__add_callchain_flat()
122 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_flat()
125 gtk_tree_store_set(store, &iter, col, buf, -1); in perf_gtk__add_callchain_flat()
140 gtk_tree_store_append(store, &iter, &new_parent); in perf_gtk__add_callchain_flat()
143 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_flat()
146 gtk_tree_store_set(store, &iter, col, buf, -1); in perf_gtk__add_callchain_flat()
160 static void perf_gtk__add_callchain_folded(struct rb_root *root, GtkTreeStore *store, in perf_gtk__add_callchain_folded() argument
209 gtk_tree_store_append(store, &iter, parent); in perf_gtk__add_callchain_folded()
212 gtk_tree_store_set(store, in perf_gtk__add_callchain_folded()
220 perf_gtk__add_callchain_graph(struct rb_root * root,GtkTreeStore * store,GtkTreeIter * parent,int col,u64 total) perf_gtk__add_callchain_graph() argument
270 perf_gtk__add_callchain(struct rb_root * root,GtkTreeStore * store,GtkTreeIter * parent,int col,u64 total) perf_gtk__add_callchain() argument
299 GtkTreeStore *store; perf_gtk__show_hists() local
407 perf_gtk__add_hierarchy_entries(struct hists * hists,struct rb_root_cached * root,GtkTreeStore * store,GtkTreeIter * parent,struct perf_hpp * hpp,float min_pcnt) perf_gtk__add_hierarchy_entries() argument
504 GtkTreeStore *store; perf_gtk__show_hierarchy() local
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/linux/arch/mips/cavium-octeon/
H A Docteon-memcpy.S89 #define STORE sd macro
192 EXC( STORE t0, UNIT(0)(dst), s_exc_p16u)
193 EXC( STORE t1, UNIT(1)(dst), s_exc_p15u)
194 EXC( STORE t2, UNIT(2)(dst), s_exc_p14u)
195 EXC( STORE t3, UNIT(3)(dst), s_exc_p13u)
200 EXC( STORE t0, UNIT(4)(dst), s_exc_p12u)
201 EXC( STORE t1, UNIT(5)(dst), s_exc_p11u)
202 EXC( STORE t2, UNIT(6)(dst), s_exc_p10u)
204 EXC( STORE t3, UNIT(7)(dst), s_exc_p9u)
210 EXC( STORE t
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/linux/net/netfilter/ipset/
H A DKconfig33 can store IPv4 addresses (or network addresses) from a range.
42 can store IPv4 address and (source) MAC address pairs from a range.
51 can store TCP/UDP port numbers from a range.
60 can store arbitrary IPv4 or IPv6 addresses (or network addresses)
70 can store IPv4/IPv6 address and mark pairs.
79 can store IPv4/IPv6 address and protocol/port pairs.
88 one can store IPv4/IPv6 address, protocol/port, and IPv4/IPv6
98 one can store IPv4/IPv6 address, protocol/port, and IPv4/IPv6
108 one can store IPv4/IPv6 address and MAC (ethernet address) pairs in a set.
117 one can store MA
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
H A Dspec_operation.json32 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have successfully completed the store operation."
36 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have not successfully completed the store operation."
40 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed."
48 "PublicDescription": "Counts speculatively executed store operations including Single Instruction Multiple Data (SIMD) store operations."
56 "PublicDescription": "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-operations that move data to or from SIMD (vector) registers."
88 "PublicDescription": "Counts DSB operations that are speculatively issued to Load/Store unit in the CPU."
92 "PublicDescription": "Counts DMB operations that are speculatively issued to the Load/Store uni
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/linux/tools/testing/selftests/powerpc/ptrace/
H A Dptrace-vsx.h67 * unsigned long store[128]
70 int compare_vsx_vmx(unsigned long *store, unsigned long *load) in compare_vsx_vmx() argument
75 if (store[1 + 2 * i] != load[1 + 2 * i]) { in compare_vsx_vmx()
76 printf("store[%d]: %lx load[%d] %lx\n", in compare_vsx_vmx()
77 1 + 2 * i, store[i], in compare_vsx_vmx()
85 if (store[i] != load[i]) { in compare_vsx_vmx()
86 printf("store[%d]: %lx load[%d] %lx\n", in compare_vsx_vmx()
87 i, store[i], i, load[i]); in compare_vsx_vmx()
93 if (!(i % 2) && (store[i] != load[i+1])) { in compare_vsx_vmx()
94 printf("store[ in compare_vsx_vmx()
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v3/
H A Dspec_operation.json36 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have successfully completed the store operation."
40 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have not successfully completed the store operation."
44 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed."
52 "PublicDescription": "Counts speculatively executed store operations including Single Instruction Multiple Data (SIMD) store operations."
56 "PublicDescription": "Counts load and store operations that have been speculatively executed."
64 "PublicDescription": "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-operations that move data to or from SIMD (vector) registers."
96 "PublicDescription": "Counts DSB operations that are speculatively issued to Load/Store uni
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
H A Dspec_operation.json36 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have successfully completed the store operation."
40 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have not successfully completed the store operation."
44 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed."
52 "PublicDescription": "Counts speculatively executed store operations including Single Instruction Multiple Data (SIMD) store operations."
60 "PublicDescription": "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-operations that move data to or from SIMD (vector) registers."
92 "PublicDescription": "Counts DSB operations that are speculatively issued to Load/Store unit in the CPU."
96 "PublicDescription": "Counts DMB operations that are speculatively issued to the Load/Store uni
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/linux/sound/usb/
H A Dmixer_us16x08.c358 /* gets a current mixer value from common store */
421 struct snd_us16x08_comp_store *store = elem->private_data; in snd_us16x08_comp_get() local
425 ucontrol->value.integer.value[0] = store->val[val_idx][index]; in snd_us16x08_comp_get()
435 struct snd_us16x08_comp_store *store = elem->private_data; in snd_us16x08_comp_put() local
451 store->val[val_idx][index] = ucontrol->value.integer.value[0]; in snd_us16x08_comp_put()
457 buf[8] = store->val[ in snd_us16x08_comp_put()
460 buf[11] = ratio_map[store->val[ in snd_us16x08_comp_put()
462 buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] in snd_us16x08_comp_put()
464 buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] in snd_us16x08_comp_put()
466 buf[20] = store in snd_us16x08_comp_put()
489 struct snd_us16x08_eq_store *store = elem->private_data; snd_us16x08_eqswitch_get() local
505 struct snd_us16x08_eq_store *store = elem->private_data; snd_us16x08_eqswitch_put() local
548 struct snd_us16x08_eq_store *store = elem->private_data; snd_us16x08_eq_get() local
565 struct snd_us16x08_eq_store *store = elem->private_data; snd_us16x08_eq_put() local
619 snd_get_meter_comp_index(struct snd_us16x08_meter_store * store) snd_get_meter_comp_index() argument
655 get_meter_levels_from_urb(int s,struct snd_us16x08_meter_store * store,u8 * meter_urb) get_meter_levels_from_urb() argument
689 struct snd_us16x08_meter_store *store = elem->private_data; snd_us16x08_meter_get() local
748 struct snd_us16x08_meter_store *store = elem->private_data; snd_us16x08_meter_put() local
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/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
H A Dpipeline.json45 "PublicDescription": "No operation issued due to the backend, address interlock. This event counts every cycle where the issue of an operation is stalled and there is an interlock on an address operand. This type of interlock is caused by a load/store instruction waiting for data to calculate the address. Stall cycles due to a stall in the Wr stage are excluded",
48 "BriefDescription": "No operation issued due to the backend, address interlock. This event counts every cycle where the issue of an operation is stalled and there is an interlock on an address operand. This type of interlock is caused by a load/store instruction waiting for data to calculate the address. Stall cycles due to a stall in the Wr stage are excluded"
63 "PublicDescription": "No operation issued due to the backend, store. This event counts every cycle where there is a stall in the Wr stage due to a store",
66 "BriefDescription": "No operation issued due to the backend, store. This event counts every cycle where there is a stall in the Wr stage due to a store"
81 "PublicDescription": "No operation issued due to the backend, store, Store Buffer (STB) full. This event counts every cycle where there is a stall in the Wr stage because of a store operation that is waiting due to the STB being full",
84 "BriefDescription": "No operation issued due to the backend, store, Stor
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/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
H A Dpipeline.json33 "PublicDescription": "No operation issued due to the backend, interlock, AGU.This event counts every cycle that issue is stalled and there is an interlock that is due to a load/store instruction waiting for data to calculate the address in the AGU. Stall cycles due to a stall in Wr (typically awaiting load data) are excluded",
36 "BriefDescription": "No operation issued due to the backend, interlock, AGU.This event counts every cycle that issue is stalled and there is an interlock that is due to a load/store instruction waiting for data to calculate the address in the AGU. Stall cycles due to a stall in Wr (typically awaiting load data) are excluded"
51 "PublicDescription": "No operation issued due to the backend, store.This event counts every cycle there is a stall in the Wr stage due to a store",
54 "BriefDescription": "No operation issued due to the backend, store.This event counts every cycle there is a stall in the Wr stage due to a store"
69 "PublicDescription": "No operation issued due to the backend, store, STB full.This event counts every cycle there is a stall in the Wr stage due to a store which is waiting due to the STB being full",
72 "BriefDescription": "No operation issued due to the backend, store, STB full.This event counts every cycle there is a stall in the Wr stage due to a store whic
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n3/
H A Dspec_operation.json20 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed and have not successfully completed the store operation."
24 "PublicDescription": "Counts store-exclusive operations that have been speculatively executed."
32 "PublicDescription": "Counts speculatively executed store operations including Single Instruction Multiple Data (SIMD) store operations."
40 "PublicDescription": "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-operations that move data to or from SIMD (vector) registers."
60 "PublicDescription": "Counts DSB operations that are speculatively issued to Load/Store unit in the CPU."
64 "PublicDescription": "Counts DMB operations that are speculatively issued to the Load/Store unit in the CPU. This event does not count implied barriers from load acquire/store release operations."
72 "PublicDescription": "Counts any store releas
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/linux/tools/memory-model/Documentation/
H A Dexplanation.txt86 store instruction accessing the same location (we ignore complicating
169 store to buf but before the store to flag. In this case, r1 and r2
191 store to the same memory location, from any CPU.
197 Since r1 = 1, P0 must store 1 to flag before P1 loads 1 from
205 store to the same address.
210 Since an instruction (in this case, P0's store to flag) cannot
219 x86 and SPARC follow yet a different memory model: TSO (Total Store
222 Consistency. One example is the Store Buffer (SB) pattern, in which
319 is concerned only with the store itsel
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H A Dglossary.txt35 When an acquire load returns the value stored by a release store
37 from" the release store), then all operations preceding that
38 store "happen before" any operations following that load acquire.
42 Coherence (co): When one CPU's store to a given variable overwrites
43 either the value from another CPU's store or some later value,
54 Control Dependency: When a later store's execution depends on a test
56 a "control dependency" extends from that load to that store.
88 Data Dependency: When the data written by a later store is computed based
90 extends from that load to that later store. For example:
105 From-Reads (fr): When one CPU's store t
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/linux/arch/loongarch/kernel/
H A Dkdebugfs.c68 #define LDSTORDER_NLD_NST 0x0 /* 000 = No Load No Store */
69 #define LDSTORDER_ALD_NST 0x1 /* 001 = All Load No Store */
70 #define LDSTORDER_SLD_NST 0x3 /* 011 = Same Load No Store */
71 #define LDSTORDER_NLD_AST 0x4 /* 100 = No Load All Store */
72 #define LDSTORDER_ALD_AST 0x5 /* 101 = All Load All Store */
73 #define LDSTORDER_SLD_AST 0x7 /* 111 = Same Load All Store */
76 "No Load No Store",
77 "All Load No Store",
79 "Same Load No Store",
80 "No Load All Store",
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/linux/drivers/acpi/acpica/
H A Dexstore.c4 * Module Name: exstore - AML Interpreter object store support
36 * *dest_desc - Where to store it. Must be an NS node
43 * DESCRIPTION: Store the value described by source_desc into the location
45 * functions to store the result of an operation into
46 * the destination operand -- not just simply the actual "Store"
116 * 1) Store to Name (Change the object associated with a name) in acpi_ex_store()
117 * 2) Store to an indexed area of a Buffer or Package in acpi_ex_store()
118 * 3) Store to a Method Local or Arg in acpi_ex_store()
119 * 4) Store to the debug object in acpi_ex_store()
144 /* Store t in acpi_ex_store()
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/linux/arch/arm/lib/
H A Dbitops.h31 .macro __testop, name, instr, store, barrier
61 .macro testop, name, instr, store
62 __testop \name, \instr, \store, smp_dmb
65 .macro sync_testop, name, instr, store
66 __testop \name, \instr, \store, __smp_dmb
91 * @store: store instruction
93 * Note: we can trivially conditionalise the store instruction
96 .macro testop, name, instr, store
108 \store r
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