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/linux-6.8/Documentation/devicetree/bindings/bus/
Dqcom,ssc-block-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs
10 - Michael Srba <Michael.Srba@seznam.cz>
14 need to be turned on in a sequence before communication over the AHB bus
20 The SSC (Snapdragon Sensor Core) block contains a gpio controller, i2c/spi/uart
27 - const: qcom,msm8998-ssc-block-bus
28 - const: qcom,ssc-block-bus
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/linux-6.8/drivers/bus/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 # Bus Devices
6 menu "Bus devices"
24 bool "ARM Integrator Logic Module bus"
29 Say y here to enable support for the ARM Logic Module bus
33 tristate "Broadcom STB GISB bus arbiter"
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
39 and internal bus master decoding.
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the bus drivers.
6 # Interconnect bus drivers for ARM platforms
7 obj-$(CONFIG_ARM_CCI) += arm-cci.o
8 obj-$(CONFIG_ARM_INTEGRATOR_LM) += arm-integrator-lm.o
9 obj-$(CONFIG_HISILICON_LPC) += hisi_lpc.o
10 obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o
11 obj-$(CONFIG_MOXTET) += moxtet.o
13 # DPAA2 fsl-mc bus
14 obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
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Dqcom-ssc-block-bus.c1 // SPDX-License-Identifier: GPL-2.0-only
68 ret = clk_prepare_enable(data->xo_clk); in qcom_ssc_block_bus_init()
74 ret = clk_prepare_enable(data->aggre2_clk); in qcom_ssc_block_bus_init()
80 ret = clk_prepare_enable(data->gcc_im_sleep_clk); in qcom_ssc_block_bus_init()
90 reg32_clear_bits(data->reg_mpm_sscaon_config0, in qcom_ssc_block_bus_init()
93 reg32_clear_bits(data->reg_mpm_sscaon_config1, BIT(31)); in qcom_ssc_block_bus_init()
95 ret = clk_prepare_enable(data->aggre2_north_clk); in qcom_ssc_block_bus_init()
101 ret = reset_control_deassert(data->ssc_reset); in qcom_ssc_block_bus_init()
107 ret = reset_control_deassert(data->ssc_bcr); in qcom_ssc_block_bus_init()
113 regmap_write(data->halt_map, data->ssc_axi_halt + AXI_HALTREQ_REG, 0); in qcom_ssc_block_bus_init()
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/linux-6.8/drivers/i2c/busses/
Di2c-st.c1 // SPDX-License-Identifier: GPL-2.0-only
23 /* SSC registers */
47 /* SSC Control */
62 /* SSC Interrupt Enable */
76 /* SSC Status */
93 /* SSC I2C Control */
103 /* SSC Tx FIFO Status */
106 /* SSC Rx FIFO Status */
109 /* SSC Clear bit operation */
116 /* SSC Clock Prescaler */
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 menu "I2C Hardware Bus support"
16 for Cypress CCGx Type-C controller. Individual bus drivers
25 controller is part of the 7101 device, which is an ACPI-compliant
29 will be called i2c-ali1535.
37 controller is part of the 7101 device, which is an ACPI-compliant
41 will be called i2c-ali1563.
51 will be called i2c-ali15x3.
63 will be called i2c-amd756.
70 S4882 motherboard. On this 4-CPU board, the SMBus is multiplexed
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/linux-6.8/drivers/misc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
27 See Documentation/misc-devices/ad525x_dpot.rst for the
34 tristate "support I2C bus connection"
37 Say Y here if you have a digital potentiometers hooked to an I2C bus.
40 module will be called ad525x_dpot-i2c.
43 tristate "support SPI bus connection"
46 Say Y here if you have a digital potentiometers hooked to an SPI bus.
51 module will be called ad525x_dpot-spi.
65 This option enables device driver support for in-band access to the
78 website <https://www-03.ibm.com/systems/info/x86servers/serverproven/compat/us/>
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/linux-6.8/drivers/gpu/drm/i915/display/
Dintel_vbt_defs.h2 * Copyright © 2006-2016 Intel Corporation
43 * struct vbt_header - VBT Header structure
51 * @aim_offset: Offsets of add-in data blocks from beginning of VBT
65 * struct bdb_header - BDB Header structure
67 * @version: Version of the data block definitions
85 * <start>-<end>
93 * There are several types of BIOS data blocks (BDBs), each block has
133 BDB_SKIP = 254, /* VBIOS private block, ignore */
137 * Block 1 - General Bit Definitions
175 u8 dp_ssc_enable:1; /* PCH attached eDP supports SSC */
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Dintel_display_core.h1 /* SPDX-License-Identifier: MIT */
61 * fills out the pipe-config with the hw state.
130 int ssc; member
134 * Bitmask of PLLs using the PCH SSC, indexed using enum intel_dpll_id.
183 * if we get a HPD irq from DP and a HPD irq from non-DP
184 * the non-DP HPD could block the workqueue on a mode config
187 * blocked behind the non-DP one.
265 * protects * intel_crtc->wm.active and
266 * crtc_state->wm.need_postvbl_update.
276 /* Top level crtc-ish functions */
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Dintel_dp.c107 * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
119 return dig_port->base.type == INTEL_OUTPUT_EDP; in intel_dp_is_edp()
127 return drm_dp_is_uhbr_rate(crtc_state->port_clock); in intel_dp_is_uhbr()
131 * intel_dp_link_symbol_size - get the link symbol size for a given link rate
135 * rate -> channel coding.
143 * intel_dp_link_symbol_clock - convert link rate to link symbol clock
156 intel_dp->sink_rates[0] = 162000; in intel_dp_set_default_sink_rates()
157 intel_dp->num_sink_rates = 1; in intel_dp_set_default_sink_rates()
169 if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS)) { in intel_dp_set_dpcd_sink_rates()
173 memcpy(intel_dp->sink_rates, quirk_rates, sizeof(quirk_rates)); in intel_dp_set_dpcd_sink_rates()
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/linux-6.8/drivers/gpu/drm/bridge/cadence/
Dcdns-mhdp8546-core.c1 // SPDX-License-Identifier: GPL-2.0
7 * Authors: Quentin Schulz <quentin.schulz@free-electrons.com>
14 * - Implement optimized mailbox communication using mailbox interrupts
15 * - Add support for power management
16 * - Add support for features like audio, MST and fast link training
17 * - Implement request_fw_cancel to handle HW_STATE
18 * - Fix asynchronous loading of firmware implementation
19 * - Add DRM helper function for cdns_mhdp_lower_link_rate
29 #include <linux/media-bus-format.h>
33 #include <linux/phy/phy-dp.h>
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/linux-6.8/arch/arm/boot/dts/broadcom/
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
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/linux-6.8/drivers/phy/broadcom/
Dphy-brcm-usb-init.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * phy-brcm-usb-init.c - Broadcom USB Phy chip specific init functions
5 * Copyright (C) 2014-2017 Broadcom
16 #include "phy-brcm-usb-init.h"
22 /* Register definitions for the USB CTRL block */
81 /* Register definitions for the XHCI EC block */
142 (params->usb_reg_bits_map[USB_CTRL_##reg##_##field##_SELECTOR])
453 mask = params->usb_reg_bits_map[field]; in usb_ctrl_unset_family()
454 brcm_usb_ctrl_unset(params->regs[BRCM_REGS_CTRL] + reg_offset, mask); in usb_ctrl_unset_family()
463 mask = params->usb_reg_bits_map[field]; in usb_ctrl_set_family()
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/linux-6.8/drivers/scsi/
Dscsi_error.c1 // SPDX-License-Identifier: GPL-2.0-only
66 lockdep_assert_held(shost->host_lock); in scsi_eh_wakeup()
68 if (busy == shost->host_failed) { in scsi_eh_wakeup()
70 wake_up_process(shost->ehandler); in scsi_eh_wakeup()
77 * scsi_schedule_eh - schedule EH for SCSI host
86 spin_lock_irqsave(shost->host_lock, flags); in scsi_schedule_eh()
90 shost->host_eh_scheduled++; in scsi_schedule_eh()
94 spin_unlock_irqrestore(shost->host_lock, flags); in scsi_schedule_eh()
100 if (!shost->last_reset || shost->eh_deadline == -1) in scsi_host_eh_past_deadline()
110 if (time_before(jiffies, shost->last_reset + shost->eh_deadline) && in scsi_host_eh_past_deadline()
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Dst.c1 // SPDX-License-Identifier: GPL-2.0-only
13 Copyright 1992 - 2016 Kai Makisara
16 Some small formal changes - aeb, 950809
18 Last modified: 18-JAN-1998 Richard Gooch <rgooch@atnf.csiro.au> Devfs support
62 is defined and non-zero. */
105 MODULE_PARM_DESC(buffer_kbs, "Default driver buffer size for fixed block mode (KB; 32)");
159 6-byte SCSI read and write commands. */
160 #if ST_FIXED_BUFFER_SIZE >= (2 << 24 - 1)
161 #error "Buffer size should not exceed (2 << 24 - 1) bytes!"
174 /* Remove mode bits and auto-rewind bit (7) */
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Dscsi_debug.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Copyright (C) 2001 - 2021 Douglas Gilbert
33 #include <linux/crc-t10dif.h>
39 #include <linux/t10-pi.h>
88 #define BUS_RESET_ASCQ 0x2 /* scsi bus reset occurred */
145 #define DEF_SCSI_LEVEL 7 /* INQUIRY, byte2 [6->SPC-4; 7->SPC-5] */
159 #define JDELAY_OVERRIDDEN -9999
197 /* As indicated in SAM-5 and SPC-4 Unit Attentions (UAs) are returned in
201 #define SDEBUG_UA_POR 0 /* Power on, reset, or bus device reset */
219 * per-device DEF_CMD_PER_LUN can be changed via sysfs:
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/linux-6.8/drivers/s390/block/
Ddasd_eckd.c1 // SPDX-License-Identifier: GPL-2.0
13 #define KMSG_COMPONENT "dasd-eckd"
58 /* The ccw bus type uses this table to find devices that it sends to
140 /* set ECKD specific ccw-device options */ in dasd_eckd_probe()
146 "ccw-device options"); in dasd_eckd_probe()
169 return (d1 + (d2 - 1)) / d2; in ceil_quot()
178 switch (rdc->dev_type) { in recs_per_track()
207 geo->cyl = (__u16) cyl; in set_ch_t()
208 geo->head = cyl >> 16; in set_ch_t()
209 geo->head <<= 4; in set_ch_t()
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/linux-6.8/drivers/gpu/drm/display/
Ddrm_dp_helper.c75 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
229 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
230 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
241 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
242 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
254 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
255 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
277 * - Clock recovery vs. channel equalization
278 * - DPRX vs. LTTPR
279 * - 128b/132b vs. 8b/10b
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Ddrm_dp_mst_topology.c207 number_of_bits--; in drm_dp_msg_header_crc4()
211 bitshift--; in drm_dp_msg_header_crc4()
223 number_of_bits--; in drm_dp_msg_header_crc4()
241 number_of_bits--; in drm_dp_msg_data_crc4()
245 bitshift--; in drm_dp_msg_data_crc4()
257 number_of_bits--; in drm_dp_msg_data_crc4()
269 size += (hdr->lct / 2); in drm_dp_calc_sb_hdr_size()
280 buf[idx++] = ((hdr->lct & 0xf) << 4) | (hdr->lcr & 0xf); in drm_dp_encode_sideband_msg_hdr()
281 for (i = 0; i < (hdr->lct / 2); i++) in drm_dp_encode_sideband_msg_hdr()
282 buf[idx++] = hdr->rad[i]; in drm_dp_encode_sideband_msg_hdr()
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/linux-6.8/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/linux-6.8/drivers/gpu/drm/i915/
Di915_reg.h18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
44 * registers that are defined solely for the use by function-like macros.
52 * should be defined using function-like macros.
58 * with underscore, followed by a function-like macro choosing the right
68 * function-like macros may be used to define bit fields, but do note that the
87 * Try to re-use existing register macro definitions. Only add new macros for
204 #define DPIO_POST_DIV_HDMIDP 1 /* DAC 225-400M rate */
249 /* Spec for ref block start counts at DW10 */
551 _MMIO(BXT_PHY_BASE(phy) - _BXT_PHY0_BASE + (reg))
554 (BXT_PHY_BASE(phy) + _PIPE((ch), (reg_ch0) - _BXT_PHY0_BASE, \
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/linux-6.8/drivers/gpu/drm/mediatek/
Dmtk_dp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019-2022 MediaTek Inc.
18 #include <linux/arm-smccc.h>
23 #include <linux/media-bus-format.h>
24 #include <linux/nvmem-consumer.h>
33 #include <sound/hdmi-codec.h>
319 .name = "mtk-dp-registers",
332 ret = regmap_read(mtk_dp->regs, offset, &read_val); in mtk_dp_read()
334 dev_err(mtk_dp->dev, "Failed to read register 0x%x: %d\n", in mtk_dp_read()
344 int ret = regmap_write(mtk_dp->regs, offset, val); in mtk_dp_write()
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/linux-6.8/drivers/net/ethernet/intel/e1000e/
Dich8lan.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
5 * 82562G-2 10/100 Network Connection
7 * 82562GT-2 10/100 Network Connection
9 * 82562V-2 10/100 Network Connection
10 * 82566DC-2 Gigabit Network Connection
12 * 82566DM-2 Gigabit Network Connection
19 * 82567LM-2 Gigabit Network Connection
20 * 82567LF-2 Gigabit Network Connection
21 * 82567V-2 Gigabit Network Connection
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/linux-6.8/drivers/gpu/drm/amd/include/
Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …turnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_3[7]=0 - Progra…
433 …turnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_3[7]=0 - Progra…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
538 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
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