Home
last modified time | relevance | path

Searched +full:spi +full:- +full:only +full:- +full:use +full:- +full:cs1 +full:- +full:sel (Results 1 – 5 of 5) sorted by relevance

/linux-6.8/Documentation/devicetree/bindings/spi/
Dspi-fsl-lpspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Low Power SPI (LPSPI) for i.MX
10 - Anson Huang <Anson.Huang@nxp.com>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - enum:
19 - fsl,imx7ulp-spi
20 - fsl,imx8qxp-spi
[all …]
/linux-6.8/arch/arm64/boot/dts/freescale/
Dimx8dxl-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
22 stdout-path = &lpuart0;
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
36 * Memory reserved for optee usage. Please do not use.
37 * This will be automatically added to dtb if OP-TEE is installed.
40 * no-map;
[all …]
/linux-6.8/drivers/spi/
Dspi-fsl-lpspi.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/dma-mapping.h>
22 #include <linux/dma/imx-dma.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/spi_bitbang.h>
34 #define FSL_LPSPI_MAX_EDMA_BYTES ((1 << 15) - 1)
125 { .compatible = "fsl,imx7ulp-spi", },
133 unsigned int val = readl(fsl_lpspi->base + IMX7ULP_RDR); \
135 if (fsl_lpspi->rx_buf) { \
136 *(type *)fsl_lpspi->rx_buf = val; \
[all …]
/linux-6.8/arch/arm/boot/dts/nvidia/
Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <&reg_module_3v3>;
21 vddio-pex-ctl-supply = <&reg_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
[all …]
Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <&reg_module_3v3>;
20 vddio-pex-ctl-supply = <&reg_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
[all …]