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/linux-6.15/Documentation/devicetree/bindings/mailbox/
D	apple,mailbox.yaml	`1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hector Martin <marcan@marcan.st> 11 - Sven Peter <sven@svenpeter.dev> 15 messages between the main CPU and a co-processor. Multiple instances 17 One of the two FIFOs is used to send data to a co-processor while the other 25 - description: 30 - enum: 31 - apple,t8103-asc-mailbox [all …]`
/linux-6.15/tools/perf/pmu-events/arch/x86/ivytown/
D	uncore-interconnect.json	18 … had an address match with another request in the write cache.; When it is not possible to merge t… 28 …not yet returned their data to the uncore. These writes are generally queued up in the switch try… 38 …": "Accumulates the number of writes that have acquired ownership but have not yet returned their … 58 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 78 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 98 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 118 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 164 "BriefDescription": "BL Ingress Occupancy - DRS", 189 "BriefDescription": "BL Ingress Occupancy - NCB", 214 "BriefDescription": "BL Ingress Occupancy - NCS", [all …]
D	uncore-cache.json	15 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 24 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 34 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 44 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 54 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 64 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 209 "BriefDescription": "LRU Queue; Non-0 Aged Victim", 214 "PublicDescription": "How often we picked a victim that had a non-zero age", 224 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 234 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … [all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/haswellx/
D	uncore-interconnect.json	18 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 111 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary", 116 …"PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary", 126 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary", 136 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", 146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests", [all …]
D	uncore-cache.json	27 …"BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derive… 111 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.mi… 214 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 227 … "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)", 233 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 244 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 254 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 264 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 274 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 284 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… [all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/broadwellx/
D	uncore-interconnect.json	18 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 111 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary", 116 …"PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary", 126 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary", 136 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", 146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests", [all …]
D	uncore-cache.json	27 …"BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derive… 111 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.mi… 214 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 227 … "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)", 233 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 244 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 254 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 264 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 274 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 284 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… [all …]
/linux-6.15/arch/arm64/boot/dts/apple/
D	t600x-nvme.dtsi	`1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 9 compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4"; 11 interrupt-parent = <&aic>; 16 interrupt-names = "send-empty", "send-not-empty", 17 "recv-empty", "recv-not-empty"; 18 power-domains = <&DIE_NODE(ps_ans2)>; 19 #mbox-cells = <0>; 23 compatible = "apple,t6000-sart"; 25 power-domains = <&DIE_NODE(ps_ans2)>; 29 compatible = "apple,t6000-nvme-ans2", "apple,nvme-ans2"; [all …]`
/linux-6.15/tools/perf/pmu-events/arch/x86/sapphirerapids/
D	uncore-interconnect.json	31 "BriefDescription": "FAF - request insert from TC.", 47 "BriefDescription": "FAF allocation -- sent to ADQ", 84 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 94 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 104 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 114 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 124 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 134 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 144 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 154 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", [all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/emeraldrapids/
D	uncore-interconnect.json	31 "BriefDescription": "FAF - request insert from TC.", 47 "BriefDescription": "FAF allocation -- sent to ADQ", 84 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 94 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 104 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 114 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 124 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 134 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 144 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 154 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", [all …]
/linux-6.15/Documentation/networking/caif/
D	caif.rst	1 .. SPDX-License-Identifier: GPL-2.0 10 :Copyright: \|copy\| ST-Ericsson AB 2010 40 The use of Start-of-frame-extension (STX) must also be set as 59 /sys/kernel/debug/caif_serial/<tty-name>/ 61 * ser_state: Prints the bit-mask status where 63 - 0x02 means SENDING, this is a transient state. 64 - 0x10 means FLOW_OFF_SENT, i.e. the previous frame has not been sent 65 and is blocking further send operation. Flow OFF has been propagated 68 * tty_status: Prints the bit-mask tty status information 70 - 0x01 - tty->warned is on. [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
D	stall.json	`4 …not send any micro-operations to the rename stage because of frontend resource stalls caused by fe… 8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. …`
/linux-6.15/tools/perf/pmu-events/arch/x86/skylakex/
D	uncore-interconnect.json	104 …date to Modified command that requests ownership of the cacheline and does not move data from the … 157 "BriefDescription": "FAF allocation -- sent to ADQ", 186 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary", 196 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary", 206 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary", 216 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", 226 "BriefDescription": "Misc Events - Set 0; Fastpath Requests", 236 "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary", 246 "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From Primary to Secondary", 256 "BriefDescription": "Misc Events - Set 0", [all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/cascadelakex/
D	uncore-interconnect.json	104 …date to Modified command that requests ownership of the cacheline and does not move data from the … 157 "BriefDescription": "FAF allocation -- sent to ADQ", 186 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary", 196 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary", 206 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary", 216 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", 226 "BriefDescription": "Misc Events - Set 0; Fastpath Requests", 236 "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary", 246 "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From Primary to Secondary", 256 "BriefDescription": "Misc Events - Set 0", [all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/icelakex/
D	uncore-interconnect.json	59 …date to Modified command that requests ownership of the cacheline and does not move data from the … 111 "BriefDescription": "FAF allocation -- sent to ADQ", 148 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 158 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 168 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 178 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 188 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 198 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 208 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 218 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
D	stall.json	`4 …not send any micro-operations to the rename stage because of frontend resource stalls caused by fe… 8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. …`
/linux-6.15/rust/kernel/
D	types.rs	1 // SPDX-License-Identifier: GPL-2.0 14 /// Used to transfer ownership to and from foreign (non-Rust) languages. 22 /// Type used to immutably borrow a value that is currently foreign-owned. 25 /// Type used to mutably borrow a value that is currently foreign-owned. 28 /// Converts a Rust-owned object to a foreign-owned one. 39 fn into_foreign(self) -> mut crate::ffi::c_void; in into_foreign() 41 /// Converts a foreign-owned object back to a Rust-owned one. 46 /// must not be passed to `from_foreign` more than once. 49 unsafe fn from_foreign(ptr: mut crate::ffi::c_void) -> Self; in from_foreign() 51 /// Tries to convert a foreign-owned object back to a Rust-owned one. [all …]
D	list.rs	1 // SPDX-License-Identifier: GPL-2.0 7 // May not be needed in Rust 1.87.0 (pending beta backport). 32 /// prev/next pointers are not used for several linked lists. 36 /// * If the list is empty, then `first` is null. Otherwise, `first` points at the `ListLinks` 48 unsafe impl<T, const ID: u64> Send for List<T, ID> 50 ListArc<T, ID>: Send, 80 /// Otherwise, the returned pointer points at a read-only [`ListLinks`] with two null pointers. 84 /// The provided pointer must point at a valid value. (It need not be in an `Arc`.) 85 unsafe fn view_links(me: const Self) -> mut ListLinks<ID>; in view_links() 101 /// * Since the most recent call to `prepare_to_insert`, the `post_remove` method must not have [all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/jaketown/
D	uncore-cache.json	15 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 31 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 41 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 51 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 61 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 161 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 171 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 181 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 191 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 201 …not include when packets are being sent from the ring stop.We really have two rings in JKT -- a cl… [all …]
/linux-6.15/Documentation/virt/hyperv/
D	vmbus.rst	1 .. SPDX-License-Identifier: GPL-2.0 5 VMBus is a software construct provided by Hyper-V to guest VMs. It 7 devices that Hyper-V presents to guest VMs. The control path is 11 and the synthetic device implementation that is part of Hyper-V, and 12 signaling primitives to allow Hyper-V and the guest to interrupt 17 establishes the VMBus control path with the Hyper-V host, then 21 Most synthetic devices offered by Hyper-V have a corresponding Linux 29 * PCI device pass-thru 34 * Key/Value Pair (KVP) exchange with Hyper-V 35 * Hyper-V online backup (a.k.a. VSS) [all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/broadwellde/
D	uncore-cache.json	23 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 41 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 51 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 61 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 71 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 81 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 91 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 156 "BriefDescription": "Cbo Misc; DRd hitting non-M with raw CV=0", 266 "BriefDescription": "LRU Queue; Non-0 Aged Victim", 271 "PublicDescription": "How often we picked a victim that had a non-zero age", [all …]
/linux-6.15/tools/perf/pmu-events/arch/x86/snowridgex/
D	uncore-cache.json	977 …system. This can be filtered by when the bypass was taken and when it was not. : Filter for trans… 982 "BriefDescription": "CHA to iMC Bypass : Not Taken", 988 …Not Taken : Counts the number of times when the CHA was able to bypass HA pipe on the way to iMC. … 999 …system. This can be filtered by when the bypass was taken and when it was not. : Filter for trans… 1025 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 1036 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 1047 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 1058 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 1069 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 1080 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-n3/
D	stall.json	4 …"PublicDescription": "Counts cycles when frontend could not send any micro-operations to the renam… 8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. … 32 …"PublicDescription": "Counts cycles when the frontend could not send any micro-operations to the r… 48 …"PublicDescription": "Counts cycles when the frontend could not send any micro-operations to the r… 52 …"PublicDescription": "Counts cycles when the frontend could not send any micro-operations to the r… 56 …not send any micro-operations to the rename stage as the frontend is recovering from a machine flu… 60 …"PublicDescription": "Counts cycles when the backend could not accept any micro-operations due to … 72 … cycles when the backend is stalled and there is a store that has not reached the pre-commit stage… 76 …"PublicDescription": "Counts cycles when the backend could not accept any micro-operations due to … 80 …"PublicDescription": "Counts cycles when the backend could not accept any micro-operations because… [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-v3/
D	stall.json	4 …"PublicDescription": "Counts cycles when frontend could not send any micro-operations to the renam… 8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. … 27 …ounts cycles counted by STALL_BACKEND_BUSY when the backend could not accept any micro-operations\… 33 …_BUSY when the backend could not accept any micro-operations\nbecause the complex integer issue qu… 39 …s cycles when the backend could not accept any micro-operations\nbecause the load/store issue queu… 45 …CKEND_BUSY when the backend could not accept any micro-operations\nbecause the vector issue queues… 51 …L_BACKEND_BUSY when the backend could not accept any micro-operations\nbecause the commit queue is… 62 …"PublicDescription": "Counts cycles when the frontend could not send any micro-operations to the r… 78 …"PublicDescription": "Counts cycles when the frontend could not send any micro-operations to the r… 82 …"PublicDescription": "Counts cycles when the frontend could not send any micro-operations to the r… [all …]
/linux-6.15/drivers/tty/serial/
D	arc_uart.c	1 // SPDX-License-Identifier: GPL-2.0 3 * ARC On-Chip(fpga) UART Driver 5 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com) 8 * -Decoupled the driver from arch/arc 10 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx) 13 * -Is uart_tx_stopped() not done in tty write path as it has already been 17 * -New Serial Core based ARC UART driver 18 * -Derived largely from blackfin driver albiet with some major tweaks 21 * -check if sysreq works 42 * UART Register set (this is not a Standards Compliant IP) [all …]

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