| /linux-6.15/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-s32.c | 38 struct clk *rx_clk; member
68 ret = clk_prepare_enable(gmac->rx_clk); in s32_gmac_init()
73 ret = clk_set_rate(gmac->rx_clk, GMAC_INTF_RATE_125M); in s32_gmac_init()
89 clk_disable_unprepare(gmac->rx_clk); in s32_gmac_init()
100 clk_disable_unprepare(gmac->rx_clk); in s32_gmac_exit()
140 gmac->rx_clk = devm_clk_get(&pdev->dev, "rx"); in s32_dwmac_probe()
141 if (IS_ERR(gmac->rx_clk)) in s32_dwmac_probe()
142 return dev_err_probe(dev, PTR_ERR(gmac->rx_clk), in s32_dwmac_probe()
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| D | dwmac-meson8b.c | 61 * cleared on both, the falling and rising edge of the RX_CLK. This selects the
73 /* Defined for adding a delay to the input RX_CLK for better timing.
76 * adjust the window between RX_CLK and RX_DATA and improve the stability
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| /linux-6.15/Documentation/devicetree/bindings/net/ |
| D | qcom-emac.txt | 44 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
93 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
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| D | cdns,macb.yaml | 88 - enum: [ rx_clk, tsu_clk ]
215 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
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| D | qca,ar803x.yaml | 47 cable is disconnected. And the RX_CLK always keeps outputting a
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| D | motorcomm,yt8xxx.yaml | 57 drive strength of rx_clk rgmii pad.
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| /linux-6.15/drivers/dma/xilinx/ |
| D | xilinx_dma.c | 481 struct clk **rx_clk, struct clk **rxs_clk);
499 * @rx_clk: DMA s2mm clock
518 struct clk *rx_clk; member
2625 struct clk **tx_clk, struct clk **rx_clk, in axidma_clk_init() argument
2640 *rx_clk = devm_clk_get(&pdev->dev, "m_axi_s2mm_aclk"); in axidma_clk_init()
2641 if (IS_ERR(*rx_clk)) in axidma_clk_init()
2642 *rx_clk = NULL; in axidma_clk_init()
2660 err = clk_prepare_enable(*rx_clk); in axidma_clk_init()
2662 dev_err(&pdev->dev, "failed to enable rx_clk (%d)\n", err); in axidma_clk_init()
2675 clk_disable_unprepare(*rx_clk); in axidma_clk_init()
[all …]
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| /linux-6.15/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ |
| D | pincfg.txt | 52 0 0 2 0 1 0 /* RX_CLK */
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| /linux-6.15/drivers/net/ethernet/cadence/ |
| D | macb_main.c | 4170 struct clk *rx_clk, struct clk *tsu_clk) in macb_clks_disable() argument
4174 { .clk = rx_clk, }, in macb_clks_disable()
4185 struct clk **rx_clk, struct clk **tsu_clk) in macb_clk_init() argument
4213 *rx_clk = devm_clk_get_optional(&pdev->dev, "rx_clk"); in macb_clk_init()
4214 if (IS_ERR(*rx_clk)) in macb_clk_init()
4215 return PTR_ERR(*rx_clk); in macb_clk_init()
4239 err = clk_prepare_enable(*rx_clk); in macb_clk_init()
4241 dev_err(&pdev->dev, "failed to enable rx_clk (%d)\n", err); in macb_clk_init()
4254 clk_disable_unprepare(*rx_clk); in macb_clk_init()
4767 struct clk **rx_clk, struct clk **tsu_clk) in at91ether_clk_init() argument
[all …]
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| D | macb.h | 1196 struct clk **rx_clk, struct clk **tsu_clk);
1277 struct clk *rx_clk; member
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| /linux-6.15/arch/powerpc/boot/dts/fsl/ |
| D | mpc8568mds.dts | 148 0x4 0x11 0x2 0x0 0x2 0x0 /* RX_CLK */
176 0x5 0x11 0x2 0x0 0x2 0x0 /* RX_CLK */
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| /linux-6.15/arch/powerpc/boot/dts/ |
| D | mpc832x_rdb.dts | 179 3 21 2 0 1 0 /* RX_CLK (CLK16) */
199 0 13 2 0 1 0 /* RX_CLK (CLK9) */
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| D | kmeter1.dts | 163 0 0 2 0 1 0 /* RX_CLK */
189 0 31 2 0 1 0 /* RX_CLK */
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| /linux-6.15/drivers/net/dsa/sja1105/ |
| D | sja1105_clocking.c | 449 pad_mii_rx.clk_os = 2; /* RX_CLK/RXC output stage: */ in sja1105_cfg_pad_rx_config()
451 pad_mii_rx.clk_ih = 0; /* RX_CLK/RXC input hysteresis: */ in sja1105_cfg_pad_rx_config()
453 pad_mii_rx.clk_ipud = 2; /* RX_CLK/RXC input pull-up/down: */ in sja1105_cfg_pad_rx_config()
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| /linux-6.15/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp.dtsi | 844 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
858 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
872 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
886 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
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| D | versal-net.dtsi | 442 clock-names = "pclk", "hclk", "tx_clk", "rx_clk",
451 clock-names = "pclk", "hclk", "tx_clk", "rx_clk",
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| /linux-6.15/drivers/net/phy/ |
| D | micrel.c | 1009 /* keep rx as "No delay adjustment" and set rx_clk to +0.60ns to get delays of
1015 /* set rx to +0.30ns and rx_clk to -0.90ns to compensate the
1130 u16 rx, tx, rx_clk, tx_clk; in ksz9031_config_rgmii_delay() local
1138 rx_clk = RX_CLK_ND; in ksz9031_config_rgmii_delay()
1144 rx_clk = RX_CLK_ID; in ksz9031_config_rgmii_delay()
1150 rx_clk = RX_CLK_ID; in ksz9031_config_rgmii_delay()
1156 rx_clk = RX_CLK_ND; in ksz9031_config_rgmii_delay()
1186 FIELD_PREP(MII_KSZ9031RN_RX_CLK, rx_clk)); in ksz9031_config_rgmii_delay()
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| D | icplus.c | 35 #define IP1001_RXPHASE_SEL BIT(0) /* Add delay on RX_CLK */
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| /linux-6.15/drivers/net/ethernet/qualcomm/emac/ |
| D | emac.c | 69 "rx_clk", "sys_clk"
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| /linux-6.15/drivers/pinctrl/renesas/ |
| D | pfc-r8a7740.c | 1917 /* RXD[0:3], RX_CLK, RX_DV, RX_ER
1933 /* RXD[0:7], RX_CLK, RX_DV, RX_ER
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| /linux-6.15/drivers/net/phy/mscc/ |
| D | mscc_main.c | 540 /* For traffic to pass, the VSC8502 family needs the RX_CLK disable bit in vsc85xx_update_rgmii_cntl()
|