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/linux-6.15/drivers/slimbus/
Dqcom-ctrl.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2011-2017, The Linux Foundation
88 /* Resource group info for manager, and non-ported generic device-components */
103 struct slim_controller ctrl; member
109 struct slim_ctrl_buf rx; member
120 static void qcom_slim_queue_tx(struct qcom_slim_ctrl *ctrl, void *buf, in qcom_slim_queue_tx() argument
125 __iowrite32_copy(ctrl->base + tx_reg, buf, count); in qcom_slim_queue_tx()
131 static void *slim_alloc_rxbuf(struct qcom_slim_ctrl *ctrl) in slim_alloc_rxbuf() argument
136 spin_lock_irqsave(&ctrl->rx.lock, flags); in slim_alloc_rxbuf()
137 if ((ctrl->rx.tail + 1) % ctrl->rx.n == ctrl->rx.head) { in slim_alloc_rxbuf()
[all …]
/linux-6.15/drivers/spi/
Dspi-pic32.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
27 u32 ctrl; member
46 #define CTRL_RX_INT_SHIFT 0 /* Rx interrupt generation */
61 #define CTRL_SMP BIT(9) /* Rx at middle or end of tx */
75 #define STAT_RF_EMPTY BIT(5) /* RX Fifo empty */
88 #define CTRL2_TX_UR_EN BIT(10) /* Enable int on Tx under-run */
89 #define CTRL2_RX_OV_EN BIT(11) /* Enable int on Rx over-run */
105 u32 speed_hz; /* spi-clk rate */
116 const void *rx; member
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Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
197 #define STM32_SPI_HOST_MODE(stm32_spi) (!(stm32_spi)->device_mode)
198 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
201 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
213 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
215 * @dma_rx_en: SPI DMA RX enable register end SPI DMA RX enable bit
222 * @rx: SPI RX data register
235 const struct stm32_spi_reg rx; member
243 * struct stm32_spi_cfg - stm32 compatible configuration data
[all …]
Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include <linux/dma-mapping.h>
30 #include <linux/dma/imx-dma.h>
115 void (*rx)(struct spi_imx_data *spi_imx); member
138 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
143 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
148 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
153 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
159 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
[all …]
Dspi-ch341.c1 // SPDX-License-Identifier: GPL-2.0
3 // QiHeng Electronics ch341a USB-to-SPI adapter driver
31 struct spi_controller *ctrl; member
45 spi_controller_get_devdata(spi->controller); in ch341_set_cs()
48 memset(ch341->tx_buf, 0, CH341_PACKET_LENGTH); in ch341_set_cs()
49 ch341->tx_buf[0] = CH341A_CMD_UIO_STREAM; in ch341_set_cs()
50 ch341->tx_buf[1] = CH341A_CMD_UIO_STM_OUT | (is_high ? 0x36 : 0x37); in ch341_set_cs()
53 ch341->tx_buf[2] = CH341A_CMD_UIO_STM_DIR | 0x3f; in ch341_set_cs()
54 ch341->tx_buf[3] = CH341A_CMD_UIO_STM_END; in ch341_set_cs()
56 ch341->tx_buf[2] = CH341A_CMD_UIO_STM_END; in ch341_set_cs()
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/linux-6.15/Documentation/devicetree/bindings/serial/
Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 rx-tx-swap: true
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/linux-6.15/drivers/tty/serial/
Dfsl_lpuart.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2012-2014 Freescale Semiconductor, Inc.
14 #include <linux/dma-mapping.h>
30 /* All registers are 8-bit width */
119 /* 32-bit global registers only for i.MX7ULP/i.MX8x
124 /* 32-bit register definition */
241 /* Rx DMA timeout in ms, which is used to calculate Rx ring buffer size */
246 #define DRIVER_NAME "fsl-lpuart"
349 { .compatible = "fsl,vf610-lpuart", .data = &vf_data, },
350 { .compatible = "fsl,ls1021a-lpuart", .data = &ls1021a_data, },
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Dapbuart.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 u32 ctrl; member
29 #define UART_STATUS_OE 0x00000010 /* RX Overrun Error */
30 #define UART_STATUS_PE 0x00000020 /* RX Parity Error */
31 #define UART_STATUS_FE 0x00000040 /* RX Framing Error */
35 * The following defines the bits in the APBUART Ctrl Registers.
46 #define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase))
48 #define APBBASE_DATA_P(port) (&(APBBASE(port)->data))
49 #define APBBASE_STATUS_P(port) (&(APBBASE(port)->status))
50 #define APBBASE_CTRL_P(port) (&(APBBASE(port)->ctrl))
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/linux-6.15/drivers/net/ethernet/intel/e1000e/
Dmac.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
9 * e1000e_get_bus_info_pcie - Get PCIe bus information
18 struct pci_dev *pdev = hw->adapter->pdev; in e1000e_get_bus_info_pcie()
19 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
20 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
24 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
27 bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW, in e1000e_get_bus_info_pcie()
31 mac->ops.set_lan_id(hw); in e1000e_get_bus_info_pcie()
37 * e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
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/linux-6.15/sound/soc/fsl/
Dfsl_spdif.c1 // SPDX-License-Identifier: GPL-2.0
25 #include "imx-pcm.h"
45 #define RX_SAMPLE_RATE_KCONTROL "RX Sample Rate"
57 * @rx_burst: rx maxburst size
97 * struct fsl_spdif_priv - Freescale SPDIF private data
102 * @rxrate_kcontrol: kcontrol for RX Sample Rate
112 * @rxclk: rx clock sources for capture
114 * @sysclk: system clock for rx clock rate measurement
216 return (clk == STC_TXCLK_SPDIF_ROOT) && !spdif->soc->shared_root_clock; in fsl_spdif_can_set_clk_rate()
222 struct regmap *regmap = spdif_priv->regmap; in spdif_irq_dpll_lock()
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/linux-6.15/drivers/soc/fsl/qe/
Dqmc.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
64 /* Tx time-slot assignment table pointer (16 bits) */
66 /* Rx pointer (16 bits) */
76 /* Rx time-slot assignment table pointer (16 bits) */
82 /* Time slot assignment table Rx (32 x 16 bits) */
88 /* Rx framer base pointer (16 bits, QE only) */
92 /* A reserved area (0xB0 -> 0xC3) that must be initialized to 0 (QE only) */
129 /* Zero-insertion state (32 bits) */
133 /* Rx buffer descriptor base address (16 bits, offset from MCBASE) */
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/linux-6.15/drivers/net/ethernet/altera/
Daltera_sgdma.c1 // SPDX-License-Identifier: GPL-2.0-only
56 priv->txctrlreg = SGDMA_CTRLREG_ILASTD | in sgdma_initialize()
59 priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP | in sgdma_initialize()
63 INIT_LIST_HEAD(&priv->txlisthd); in sgdma_initialize()
64 INIT_LIST_HEAD(&priv->rxlisthd); in sgdma_initialize()
66 priv->rxdescphys = (dma_addr_t) 0; in sgdma_initialize()
67 priv->txdescphys = (dma_addr_t) 0; in sgdma_initialize()
69 priv->rxdescphys = dma_map_single(priv->device, in sgdma_initialize()
70 (void __force *)priv->rx_dma_desc, in sgdma_initialize()
71 priv->rxdescmem, DMA_BIDIRECTIONAL); in sgdma_initialize()
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/linux-6.15/Documentation/devicetree/bindings/media/
Dnxp,imx8-isi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx8ulp-isi
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/linux-6.15/drivers/media/pci/cobalt/
Dcobalt-irq.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
11 #include "cobalt-driver.h"
12 #include "cobalt-irq.h"
13 #include "cobalt-omnitek.h"
17 struct cobalt *cobalt = s->cobalt; in cobalt_dma_stream_queue_handler()
18 int rx = s->video_channel; in cobalt_dma_stream_queue_handler() local
20 COBALT_CVI_FREEWHEEL(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
22 COBALT_CVI_VMR(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
24 COBALT_CVI(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
[all …]
Dcobalt-v4l2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Derived from ivtv-ioctl.c and cx18-fileops.c
7 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
11 #include <linux/dma-mapping.h>
15 #include <linux/v4l2-dv-timings.h>
17 #include <media/v4l2-ctrls.h>
18 #include <media/v4l2-event.h>
19 #include <media/v4l2-dv-timings.h>
23 #include "cobalt-alsa.h"
24 #include "cobalt-cpld.h"
[all …]
/linux-6.15/drivers/net/ethernet/intel/igc/
Digc_base.c1 // SPDX-License-Identifier: GPL-2.0
13 * igc_reset_hw_base - Reset hardware
22 u32 ctrl; in igc_reset_hw_base() local
24 /* Prevent the PCI-E bus from sticking if there is no TLP connection in igc_reset_hw_base()
29 hw_dbg("PCI-E Master disable polling has failed\n"); in igc_reset_hw_base()
40 ctrl = rd32(IGC_CTRL); in igc_reset_hw_base()
43 wr32(IGC_CTRL, ctrl | IGC_CTRL_RST); in igc_reset_hw_base()
62 * igc_init_nvm_params_base - Init NVM func ptrs.
67 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_params_base()
73 return -ENXIO; in igc_init_nvm_params_base()
[all …]
Digc_mac.c1 // SPDX-License-Identifier: GPL-2.0
11 * igc_disable_pcie_master - Disables PCI-express master access
14 * Returns 0 (0) if successful, else returns -10
15 * (-IGC_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
18 * Disables PCI-Express master access and verifies there are no pending
25 u32 ctrl; in igc_disable_pcie_master() local
27 ctrl = rd32(IGC_CTRL); in igc_disable_pcie_master()
28 ctrl |= IGC_CTRL_GIO_MASTER_DISABLE; in igc_disable_pcie_master()
29 wr32(IGC_CTRL, ctrl); in igc_disable_pcie_master()
36 timeout--; in igc_disable_pcie_master()
[all …]
/linux-6.15/drivers/net/ethernet/ibm/emac/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Driver for PowerPC 4xx on-chip ethernet controller.
49 #include <asm/dcr-regs.h>
56 * API-correct usage requires additional support state information to be
57 * maintained for every RX and TX buffer descriptor (BD). Unfortunately, due to
66 * controversial, but I really tried to make code API-correct and efficient
67 * at the same time and didn't come up with code I liked :(. --ebs
88 * to avoid re-using the same PHY ID in cases where the arch didn't
93 * probably require in that case to have explicit PHY IDs in the device-tree
99 * if we didn't have completely random interface names at boot too :-) It's
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/linux-6.15/drivers/net/ethernet/marvell/
Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
221 IS_NO_STAT_M1 = 1<<9, /* No Rx Status from MAC 1 */
222 IS_NO_STAT_M2 = 1<<8, /* No Rx Status from MAC 2 */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
263 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
264 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
265 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
[all …]
Dsky2.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
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/linux-6.15/drivers/net/ethernet/intel/e1000/
De1000_hw.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
40 static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
41 static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
89 * e1000_set_phy_type - Set the phy type member in the hw struct.
94 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
95 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
97 switch (hw->phy_id) { in e1000_set_phy_type()
103 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
106 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
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/linux-6.15/Documentation/devicetree/bindings/sound/
Dst,stm32-spdifrx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
14 IEC-60958 and IEC-61937.
17 - $ref: dai-common.yaml#
22 - st,stm32h7-spdifrx
24 "#sound-dai-cells":
33 clock-names:
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/linux-6.15/Documentation/networking/
Dstatistics.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - standard interface statistics based on
16 - protocol-specific statistics; and
17 - driver-defined statistics available via ethtool.
20 -----------------------------
25 $ ip -s -s link show dev ens4u1u1
28 RX: bytes packets errors dropped overrun mcast
30 RX errors: length crc frame fifo missed
38 Note that `-s` has been specified twice to see all members of
40 If `-s` is specified once the detailed errors won't be shown.
[all …]
/linux-6.15/drivers/net/usb/
Dsmsc95xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2007-2008 SMSC
22 /* Rx status word */
38 /* SCSRs - System Control and Status Registers */
54 #define INT_STS_RX_STOP_ (0x00010000) /* RX Stopped */
59 #define INT_STS_RXDF_ (0x00000800) /* RX Dropped Frame */
77 #define HW_CFG_RXDOFF_ (0x00000600) /* RX Data Offset */
80 #define HW_CFG_DRP_ (0x00000040) /* Discard Errored RX Frame */
90 #define RX_FIFO_INF_USED_ (0x0000FFFF) /* RX Data FIFO Used Space */
126 #define AFC_CFG_HI_ (0x00FF0000) /* Auto Flow Ctrl High Level */
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/linux-6.15/drivers/net/ethernet/netronome/nfp/
Dnfp_net.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
21 #include <linux/io-64-nonatomic-hi-lo.h>
32 if (__nn->dp.netdev) \
33 netdev_printk(lvl, __nn->dp.netdev, fmt, ## args); \
35 dev_printk(lvl, __nn->dp.dev, "ctrl: " fmt, ## args); \
48 if (__dp->netdev) \
49 netdev_warn(__dp->netdev, fmt, ## args); \
51 dev_warn(__dp->dev, fmt, ## args); \
80 #define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */
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