net/usb/smsc95xx.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4  * Copyright (C) 2007-2008 SMSC
22 /* Rx status word */
38 /* SCSRs - System Control and Status Registers */
54 #define INT_STS_RX_STOP_	(0x00010000)	/* RX Stopped */
59 #define INT_STS_RXDF_		(0x00000800)	/* RX Dropped Frame */
77 #define HW_CFG_RXDOFF_		(0x00000600)	/* RX Data Offset */
80 #define HW_CFG_DRP_		(0x00000040)	/* Discard Errored RX Frame */
90 #define RX_FIFO_INF_USED_	(0x0000FFFF)	/* RX Data FIFO Used Space */
126 #define AFC_CFG_HI_		(0x00FF0000)	/* Auto Flow Ctrl High Level */
127 #define AFC_CFG_LO_		(0x0000FF00)	/* Auto Flow Ctrl Low Level */
129 #define AFC_CFG_FC_MULT_	(0x00000008)	/* Flow Ctrl on Mcast Frame */
130 #define AFC_CFG_FC_BRD_		(0x00000004)	/* Flow Ctrl on Bcast Frame */
131 #define AFC_CFG_FC_ADD_		(0x00000002)	/* Flow Ctrl on Addr. Decode */
132 #define AFC_CFG_FC_ANY_		(0x00000001)	/* Flow Ctrl on Any Frame */
167 #define	STRAP_STATUS_PWR_SEL_		(0x00000020) /* Device self-powered */
168 #define	STRAP_STATUS_AMDIX_EN_		(0x00000010) /* Auto-MDIX Enabled */
169 #define	STRAP_STATUS_PORT_SWAP_		(0x00000008) /* USBD+/USBD- Swapped */
196 #define INT_EP_CTL_RX_FIFO_	(0x00040000)	/* RX FIFO Has Frame */
198 #define INT_EP_CTL_RX_STOP_	(0x00010000)	/* RX Stopped */
203 #define INT_EP_CTL_RXDF_	(0x00000800)	/* RX Dropped Frame */
209 /* MAC CSRs - MAC Control and Status Registers */
282 #define Rx_COE_MODE_		(0x00000002)	/* RX Csum Offload Mode */
283 #define Rx_COE_EN_		(0x00000001)	/* RX Csum Offload Enable */
285 /* Vendor-specific PHY Definitions (via MII access) */
345 #define INT_ENP_RX_STOP_		((u32)BIT(16))	/* RX Stopped */
350 #define INT_ENP_RXDF_			((u32)BIT(11))	/* RX Dropped Frame */