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/linux/drivers/mmc/host/
H A Dsdhci_f_sdh30.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
20 #include "sdhci-pltfm.h"
26 struct reset_control *rst; member
42 u32 ctrl = 0; in sdhci_f_sdh30_soft_voltage_switch() local
45 ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
46 ctrl |= F_SDH30_CRES_O_DN; in sdhci_f_sdh30_soft_voltage_switch()
47 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
48 ctrl |= F_SDH30_MSEL_O_1_8; in sdhci_f_sdh30_soft_voltage_switch()
49 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
[all …]
H A Dsdhci-of-ma35d1.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Author: Shan-Chun Hung <shanchun1218@gmail.com>
16 #include <linux/dma-mapping.h>
32 #include "sdhci-pltfm.h"
45 struct reset_control *rst; member
77 if (likely(!len || (ALIGN(addr, SZ_128M) == ALIGN(addr + len - 1, SZ_128M)))) { in ma35_adma_write_desc()
82 offset = addr & (SZ_128M - 1); in ma35_adma_write_desc()
83 tmplen = SZ_128M - offset; in ma35_adma_write_desc()
87 len -= tmplen; in ma35_adma_write_desc()
115 switch (ios->signal_voltage) { in ma35_start_signal_voltage_switch()
[all …]
/linux/drivers/pwm/
H A Dpwm-sun4i.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 * - When outputing the source clock directly, the PWM logic will be bypassed
46 #define PWM_PRD(prd) (((prd) - 1) << 16)
85 struct reset_control *rst; member
98 return readl(sun4ichip->base + offset); in sun4i_pwm_readl()
104 writel(val, sun4ichip->base + offset); in sun4i_pwm_writel()
116 clk_rate = clk_get_rate(sun4ichip->clk); in sun4i_pwm_get_state()
118 return -EINVAL; in sun4i_pwm_get_state()
127 if ((val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) && in sun4i_pwm_get_state()
[all …]
/linux/drivers/iio/adc/
H A Dsun20i-gpadc-iio.c1 // SPDX-License-Identifier: GPL-2.0
3 * GPADC driver for sunxi platforms (D1, T113-S3 and R329)
18 #include <linux/iio/adc-helpers.h>
21 #define SUN20I_GPADC_DRIVER_NAME "sun20i-gpadc"
66 u32 ctrl; in sun20i_gpadc_adc_read() local
69 mutex_lock(&info->lock); in sun20i_gpadc_adc_read()
71 reinit_completion(&info->completion); in sun20i_gpadc_adc_read()
73 if (info->last_channel != chan->channel) { in sun20i_gpadc_adc_read()
74 info->last_channel = chan->channel; in sun20i_gpadc_adc_read()
77 writel(SUN20I_GPADC_CS_EN_ADC_CH(chan->channel), in sun20i_gpadc_adc_read()
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dbrcm,ns2-drd-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/brcm,ns2-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <florian.fainelli@broadcom.com>
11 - Hauke Mehrtens <hauke@hauke-m.de>
12 - Rafał Miłecki <zajec5@gmail.com>
16 const: brcm,ns2-drd-phy
20 - description: DRD ICFG configurations
21 - description: DRD IDM reset
[all …]
/linux/drivers/net/wireless/ath/ath10k/
H A Dahb.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2016-2017 Qualcomm Atheros, Inc. All rights reserved.
17 { .compatible = "qcom,ipq4019-wifi",
30 return &ath10k_pci_priv(ar)->ahb[0]; in ath10k_ahb_priv()
37 iowrite32(value, ar_ahb->mem + offset); in ath10k_ahb_write32()
44 return ioread32(ar_ahb->mem + offset); in ath10k_ahb_read32()
51 return ioread32(ar_ahb->gcc_mem + offset); in ath10k_ahb_gcc_read32()
58 iowrite32(value, ar_ahb->tcsr_mem + offset); in ath10k_ahb_tcsr_write32()
65 return ioread32(ar_ahb->tcsr_mem + offset); in ath10k_ahb_tcsr_read32()
75 if (ar->hw_rev == ATH10K_HW_QCA4019) in ath10k_ahb_get_num_banks()
[all …]
/linux/drivers/usb/gadget/udc/aspeed-vhub/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0+
3 * aspeed-vhub -- Driver for Aspeed SoC "vHub" USB gadget
5 * core.c - Top level support
25 #include <linux/dma-mapping.h>
33 bool internal = req->internal; in ast_vhub_done()
34 struct ast_vhub *vhub = ep->vhub; in ast_vhub_done()
38 list_del_init(&req->queue); in ast_vhub_done()
40 if ((req->req.status == -EINPROGRESS) || (status == -EOVERFLOW)) in ast_vhub_done()
41 req->req.status = status; in ast_vhub_done()
43 if (req->req.dma) { in ast_vhub_done()
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/linux/Documentation/translations/zh_CN/security/
H A Dsak.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/security/sak.rst
23 方式。一种是按下ALT-SYSRQ-K组合键，但你不应该使用这种方式，
33 你应该使用什么键序列？ CTRL-ALT-DEL用于重启机器，CTRL-ALT-
34 BACKSPACE对X服务器有特殊作用。我们将选择CTRL-ALT-PAUSE。
56 # ls -l /proc/[0-9]*/fd/* | grep console
57 l-wx------ 1 root root 64 Mar 18 00:46 /proc/579/fd/0 -> /dev/console
62 root 579 0.0 0.1 1088 436 ? S 00:43 0:00 gpm -t ps/2
86 这样做会导致系统管理应用程序出现异常 - 要对所有的情况进行充分测试。
/linux/drivers/mtd/nand/raw/
H A Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de>
10 #include <linux/dma-mapping.h>
34 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20)
40 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4)
41 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0)
156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off))
207 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc()
211 return -ERANGE; in tegra_nand_ooblayout_rs_ecc()
213 oobregion->offset = SKIP_SPARE_BYTES; in tegra_nand_ooblayout_rs_ecc()
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/linux/include/linux/platform_data/
H A Dmax197.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2012 Savoir-faire Linux Inc.
8 * For further information, see the Documentation/hwmon/max197.rst file.
15 * struct max197_platform_data - MAX197 connectivity info
16 * @convert: Function used to start a conversion with control byte ctrl.
20 int (*convert)(u8 ctrl);
/linux/drivers/char/hw_random/
H A Djh7110-trng.c1 // SPDX-License-Identifier: GPL-2.0
42 /* CTRL CMD */
100 struct reset_control *rst; member
107 /* protects against concurrent write to ctrl register */
113 MODULE_PARM_DESC(autoreq, "Auto-reseeding after random number requests by host reaches specified co…
114 " 0 - disable counter\n"
115 " other - reload value for internal counter");
119 MODULE_PARM_DESC(autoage, "Auto-reseeding after specified timer countdowns to 0:\n"
120 " 0 - disable timer\n"
121 " other - reload value for internal timer");
[all …]
/linux/Documentation/translations/zh_TW/process/
H A Demail-clients.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 .. include:: ../disclaimer-zh_TW.rst
7 :Original: Documentation/process/email-clients.rst
10 - 賈威威 Harry Wei <harryxiyou@gmail.com>
11 - 時奎亮 Alex Shi <alexs@kernel.org>
12 - 吳想成 Wu XiangCheng <bobwxc@email.cn>
15 - Yinglin Luan <synmyth@gmail.com>
16 - Xiaochen Wang <wangxiaochen0@gmail.com>
17 - yaxinsn <yaxinsn@163.com>
18 - Hu Haowen <2023002089@link.tyut.edu.cn>
[all …]
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8qm-hsio.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <dt-bindings/phy/phy.h>
20 #include <dt-bindings/phy/phy-imx8-pcie.h>
93 struct regmap *ctrl; member
120 struct imx_hsio_priv *priv = lane->priv; in imx_hsio_init()
121 struct device *dev = priv->dev; in imx_hsio_init()
124 switch (lane->phy_type) { in imx_hsio_init()
126 lane->phy_mode = PHY_MODE_PCIE; in imx_hsio_init()
127 if (lane->ctrl_index == 0) { /* PCIEA */ in imx_hsio_init()
128 lane->ctrl_off = 0; in imx_hsio_init()
[all …]
/linux/Documentation/devicetree/bindings/ufs/
H A Dhisilicon,ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Wei <liwei213@huawei.com>
18 - hisilicon,hi3660-ufs
19 - hisilicon,hi3670-ufs
21 - compatible
24 - $ref: ufs-common.yaml
29 - items:
30 - const: hisilicon,hi3660-ufs
[all …]
/linux/drivers/media/platform/amlogic/meson-ge2d/
H A Dge2d.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-event.h>
22 #include <media/v4l2-ioctl.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/videobuf2-v4l2.h>
26 #include <media/videobuf2-dma-contig.h>
28 #include "ge2d-regs.h"
30 #define GE2D_NAME "meson-ge2d"
[all …]
/linux/Documentation/translations/zh_CN/process/
H A Demail-clients.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 .. include:: ../disclaimer-zh_CN.rst
7 :Original: Documentation/process/email-clients.rst
10 - 贾威威 Harry Wei <harryxiyou@gmail.com>
11 - 时奎亮 Alex Shi <alexs@kernel.org>
12 - 吴想成 Wu XiangCheng <bobwxc@email.cn>
15 - Yinglin Luan <synmyth@gmail.com>
16 - Xiaochen Wang <wangxiaochen0@gmail.com>
17 - yaxinsn <yaxinsn@163.com>
23 ---
[all …]
/linux/drivers/media/i2c/
H A Dimx274.c1 // SPDX-License-Identifier: GPL-2.0
3 * imx274.c - IMX274 CMOS Image Sensor driver
23 #include <linux/v4l2-mediabus.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-fwnode.h>
29 #include <media/v4l2-subdev.h>
49 #define IMX274_GAIN_SHIFT_MASK ((1 << IMX274_GAIN_SHIFT) - 1)
59 / (2048 - IMX274_GAIN_REG_MAX))
76 * register SHR is limited to (SVR value + 1) x VMAX value - 4
[all …]
/linux/drivers/gpu/drm/sun4i/
H A Dsun8i_tcon_top.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <dt-bindings/clock/sun8i-tcon-top.h>
34 if (!sun8i_tcon_top_node_is_tcon_top(dev->of_node)) { in sun8i_tcon_top_set_hdmi_src()
36 return -EINVAL; in sun8i_tcon_top_set_hdmi_src()
41 return -EINVAL; in sun8i_tcon_top_set_hdmi_src()
44 spin_lock_irqsave(&tcon_top->reg_lock, flags); in sun8i_tcon_top_set_hdmi_src()
46 val = readl(tcon_top->regs + TCON_TOP_GATE_SRC_REG); in sun8i_tcon_top_set_hdmi_src()
48 val |= FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, tcon - 1); in sun8i_tcon_top_set_hdmi_src()
49 writel(val, tcon_top->regs + TCON_TOP_GATE_SRC_REG); in sun8i_tcon_top_set_hdmi_src()
51 spin_unlock_irqrestore(&tcon_top->reg_lock, flags); in sun8i_tcon_top_set_hdmi_src()
[all …]
/linux/drivers/hwtracing/ptt/
H A Dhisi_ptt.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
31 return !readl_poll_timeout(hisi_ptt->iobase + HISI_PTT_TUNING_INT_STAT, in hisi_ptt_wait_tuning_finish()
48 desc = ext_attr->var; in hisi_ptt_tune_attr_show()
50 mutex_lock(&hisi_ptt->tune_lock); in hisi_ptt_tune_attr_show()
52 reg = readl(hisi_ptt->iobase + HISI_PTT_TUNING_CTRL); in hisi_ptt_tune_attr_show()
55 desc->event_code); in hisi_ptt_tune_attr_show()
56 writel(reg, hisi_ptt->iobase + HISI_PTT_TUNING_CTRL); in hisi_ptt_tune_attr_show()
59 writel(~0U, hisi_ptt->iobase + HISI_PTT_TUNING_DATA); in hisi_ptt_tune_attr_show()
62 mutex_unlock(&hisi_ptt->tune_lock); in hisi_ptt_tune_attr_show()
[all …]
/linux/Documentation/networking/
H A Dstatistics.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - standard interface statistics based on
16 - protocol-specific statistics; and
17 - driver-defined statistics available via ethtool.
20 -----------------------------
25 $ ip -s -s link show dev ens4u1u1
38 Note that `-s` has been specified twice to see all members of
40 If `-s` is specified once the detailed errors won't be shown.
42 `ip` supports JSON formatting via the `-j` option.
51 see `Documentation/userspace-api/netlink/intro-specs.rst`.
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-xiaomi-mocha.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/input/ti-drv260x.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/thermal/thermal.h>
15 chassis-type = "tablet";
30 stdout-path = "serial0:115200n8";
41 avdd-dsi-csi-supply = <&avdd_dsi_csi>;
[all …]
/linux/Documentation/translations/zh_CN/kbuild/
H A Dkconfig.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/kbuild/kconfig.rst
87 KCONFIG_ALLCONFIG=custom-notebook.config make allnoconfig
113 N N : 100-N N/2 : N/2 : 100-N
114 [1] N:M N+M : 100-(N+M) N : M : 100-(N+M)
115 [2] N:M:L N : 100-N M : L : 100-(M+L)
162 若需要搜索帮助，输入 / 后跟 TAB-TAB（高亮显示 <Help>）并按回车键。
170 - 首先，完全匹配的符号，按字母顺序排列（完全匹配是指搜索与符号名称完全匹配）；
171 - 然后是其他匹配项，按字母顺序排列。
[all …]
/linux/Documentation/translations/sp_SP/process/
H A Demail-clients.rst1 .. include:: ../disclaimer-sp.rst
3 :Original: :ref:`Documentation/process/email-clients.rst <email_clients>`
12 ---
14 A día de hoy, la mayoría de los desarrolladores usan ``git send-email`` en
25 ----------------------
55 estar en codificación ASCII o UTF-8 únicamente. Si configura su cliente de
56 correo electrónico para enviar correos electrónicos con codificación UTF-8,
60 encabezados "References:" o "In-Reply-To:" para que el hilo de correo no
77 ---------------------------------------------------------------
85 - TUI = text-based user interface (interfaz de usuario basada en texto)
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Drzg3e-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 * 0 - SD0 is connected to eMMC (default)
14 * 1 - SD0 is connected to uSD0 card
17 * 0 - Select Module DSI connector(GPIO)
18 * 1 - Select SER2
21 * 0 - Select Misc. Signals routing
22 * 1 - Select LCD
25 * 0 - Select CAN routing
26 * 1 - Select PDM
30 compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
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