/linux-5.10/Documentation/devicetree/bindings/reserved-memory/ |
D | reserved-memory.txt | 1 *** Reserved memory regions *** 3 Reserved memory is specified as a node under the /reserved-memory node. 4 The operating system shall exclude reserved memory from normal usage 5 one can create child nodes describing particular reserved (excluded from 6 normal use) memory regions. Such memory regions are usually designed for 9 Parameters for each memory region can be encoded into the device tree 12 /reserved-memory node 13 --------------------- 14 #address-cells, #size-cells (required) - standard definition 15 - Should use the same values as the root node [all …]
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D | xen,shared-memory.txt | 1 * Xen hypervisor reserved-memory binding 3 Expose one or more memory regions as reserved-memory to the guest 5 to be a shared memory area across multiple virtual machines for 8 For each of these pre-shared memory regions, a range is exposed under 9 the /reserved-memory node as a child node. Each range sub-node is named 10 xen-shmem@<address> and has the following properties: 12 - compatible: 13 compatible = "xen,shared-memory-v1" 15 - reg: 16 the base guest physical address and size of the shared memory region [all …]
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D | qcom,rmtfs-mem.txt | 1 Qualcomm Remote File System Memory binding 3 This binding describes the Qualcomm remote filesystem memory, which serves the 4 purpose of describing the shared memory region used for remote processors to 7 - compatible: 11 "qcom,rmtfs-mem" 13 - reg: 15 Value type: <prop-encoded-array> 16 Definition: must specify base address and size of the memory region, 17 as described in reserved-memory.txt 19 - size: [all …]
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/linux-5.10/Documentation/powerpc/ |
D | firmware-assisted-dump.rst | 2 Firmware-Assisted Dump 7 The goal of firmware-assisted dump is to enable the dump of 8 a crashed system, and to do so from a fully-reset system, and 12 - Firmware-Assisted Dump (FADump) infrastructure is intended to replace 14 - Fadump uses the same firmware interfaces and memory reservation model 16 - Unlike phyp dump, FADump exports the memory dump through /proc/vmcore 19 - Unlike phyp dump, userspace tool does not need to refer any sysfs 21 - Unlike phyp dump, FADump allows user to release all the memory reserved 23 - Once enabled through kernel boot parameter, FADump can be 28 Comparing with kdump or other strategies, firmware-assisted [all …]
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/linux-5.10/kernel/dma/ |
D | contiguous.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Contiguous Memory Allocator for DMA mapping framework 4 * Copyright (c) 2010-2011 by Samsung Electronics. 9 * Contiguous Memory Allocator 11 * The Contiguous Memory Allocator (CMA) makes it possible to 12 * allocate big contiguous chunks of memory after the system has 17 * Various devices on embedded systems have no scatter-getter and/or 18 * IO map support and require contiguous blocks of memory to 22 * Such devices often require big memory buffers (a full HD frame 24 * MB of memory), which makes mechanisms such as kmalloc() or [all …]
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/linux-5.10/drivers/staging/media/atomisp/include/hmm/ |
D | hmm_pool.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Copyright (c) 2010 Intel Corporation. All Rights Reserved. 40 * struct hmm_pool_ops - memory pool callbacks. 42 * @pool_init: initialize the memory pool. 43 * @pool_exit: uninitialize the memory pool. 44 * @pool_alloc_pages: allocate pages from memory pool. 45 * @pool_free_pages: free pages to memory pool. 46 * @pool_inited: check whether memory pool is initialized. 66 * struct hmm_reserved_pool_info - represents reserved pool private data. 68 * The array is as reserved memory pool. [all …]
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/linux-5.10/include/linux/ |
D | memblock.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 7 * Logical memory blocks. 29 * enum memblock_flags - definition of memory region attributes 43 * struct memblock_region - represents a memory region 46 * @flags: memory region attributes 59 * struct memblock_type - collection of memory regions of certain type 64 * @name: the memory type symbolic name 75 * struct memblock - memblock allocator metadata 78 * @memory: usable memory regions 79 * @reserved: reserved memory regions [all …]
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D | remoteproc.h | 6 * All rights reserved. 47 * struct resource_table - firmware resource table header 50 * @reserved: reserved (must be zero) 63 * memory region). 76 u32 reserved[2]; member 81 * struct fw_rsc_hdr - firmware resource entry header 95 * enum fw_resource_type - types of resource entries 98 * memory region. 99 * @RSC_DEVMEM: request to iommu_map a memory-based peripheral. 126 #define FW_RSC_ADDR_ANY (-1) [all …]
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/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
D | ti,davinci-rproc.txt | 4 Binding status: Unstable - Subject to changes for DT representation of clocks 7 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that 8 is used to offload some of the processor-intensive tasks or algorithms, for 11 The processor cores in the sub-system usually contain additional sub-modules 12 like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory 18 Each DSP Core sub-system is represented as a single DT node. 21 -------------------- 24 - compatible: Should be one of the following, 25 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs 27 - reg: Should contain an entry for each value in 'reg-names'. [all …]
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D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The OMAP family of SoCs usually have one or more slave processor sub-systems 14 that are used to offload some of the processor-intensive tasks, or to manage 17 The processor cores in the sub-system are usually behind an IOMMU, and may 18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor [all …]
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D | ti,k3-dsp-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems 14 that are used to offload some of the processor-intensive tasks or algorithms, 17 These processor sub-systems usually contain additional sub-modules like 18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory 23 Each DSP Core sub-system is represented as a single DT node. Each node has a [all …]
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D | ti,keystone-rproc.txt | 5 sub-systems that are used to offload some of the processor-intensive tasks or 8 These processor sub-systems usually contain additional sub-modules like L1 9 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory controller, 15 Each DSP Core sub-system is represented as a single DT node, and should also 22 -------------------- 25 - compatible: Should be one of the following, 26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs 27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs 28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs 29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs [all …]
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/linux-5.10/Documentation/devicetree/bindings/soc/fsl/ |
D | qman.txt | 3 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc. 7 - QMan Node 8 - QMan Private Memory Nodes 9 - Example 13 The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan 16 flow-level queuing, is also responsible for congestion management functions such 22 - compatible 26 May include "fsl,<SoC>-qman" 28 - reg 30 Value type: <prop-encoded-array> [all …]
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D | bman.txt | 3 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc. 7 - BMan Node 8 - BMan Private Memory Node 9 - Example 13 The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA). 20 - compatible 24 May include "fsl,<SoC>-bman" 26 - reg 28 Value type: <prop-encoded-array> 34 - interrupts [all …]
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/linux-5.10/drivers/of/ |
D | of_reserved_mem.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Device tree based initialization code for reserved memory. 5 * Copyright (c) 2013, 2015 The Linux Foundation. All Rights Reserved. 12 #define pr_fmt(fmt) "OF: reserved mem: " fmt 39 return -ENOMEM; in early_init_dt_alloc_reserved_memory_arch() 49 * fdt_reserved_mem_save_node() - save fdt node for second pass initialization 61 rmem->fdt_node = node; in fdt_reserved_mem_save_node() 62 rmem->name = uname; in fdt_reserved_mem_save_node() 63 rmem->base = base; in fdt_reserved_mem_save_node() 64 rmem->size = size; in fdt_reserved_mem_save_node() [all …]
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/linux-5.10/arch/powerpc/kernel/ |
D | fadump.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 * memory contents. The most of the code implementation has been adapted 32 #include <asm/fadump-internal.h> 56 #define RESERVED_RNGS_SZ 16384 /* 16K - 128 entries */ 60 struct fadump_mrange_info reserved_mrange_info = { "reserved", rngs, 70 * fadump_cma_init() - Initialize CMA area from a fadump reserved memory 72 * This function initializes CMA area from fadump reserved memory. 73 * The total size of fadump reserved memory covers for boot memory size 75 * Initialize only the area equivalent to boot memory size for CMA use. 76 * The reamining portion of fadump reserved memory will be not given [all …]
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/linux-5.10/Documentation/devicetree/bindings/media/ |
D | s5p-mfc.txt | 10 - compatible : value should be either one among the following 11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs 12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs 13 (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC 14 (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC 15 (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC 16 (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC 18 - reg : Physical base address of the IP registers and length of memory 21 - interrupts : MFC interrupt number to the CPU. 22 - clocks : from common clock binding: handle to mfc clock. [all …]
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/linux-5.10/mm/ |
D | memblock.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Procedures for maintaining information about logical memory blocks. 35 * Memblock is a method of managing memory regions during the early 36 * boot period when the usual kernel memory allocators are not up and 39 * Memblock views the system memory as collections of contiguous 42 * * ``memory`` - describes the physical memory available to the 43 * kernel; this may differ from the actual physical memory installed 44 * in the system, for instance when the memory is restricted with 46 * * ``reserved`` - describes the regions that were allocated 47 * * ``physmem`` - describes the actual physical memory available during [all …]
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D | cma.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Contiguous Memory Allocator 5 * Copyright (c) 2010-2011 by Samsung Electronics. 45 return PFN_PHYS(cma->base_pfn); in cma_get_base() 50 return cma->count << PAGE_SHIFT; in cma_get_size() 55 return cma->name; in cma_get_name() 61 if (align_order <= cma->order_per_bit) in cma_bitmap_aligned_mask() 63 return (1UL << (align_order - cma->order_per_bit)) - 1; in cma_bitmap_aligned_mask() 73 return (cma->base_pfn & ((1UL << align_order) - 1)) in cma_bitmap_aligned_offset() 74 >> cma->order_per_bit; in cma_bitmap_aligned_offset() [all …]
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/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
D | nv40.c | 39 #define nv40_instobj(p) container_of((p), struct nv40_instobj, base.memory) 48 nv40_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data) in nv40_instobj_wr32() argument 50 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_wr32() 51 iowrite32_native(data, iobj->imem->iomem + iobj->node->offset + offset); in nv40_instobj_wr32() 55 nv40_instobj_rd32(struct nvkm_memory *memory, u64 offset) in nv40_instobj_rd32() argument 57 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_rd32() 58 return ioread32_native(iobj->imem->iomem + iobj->node->offset + offset); in nv40_instobj_rd32() 68 nv40_instobj_release(struct nvkm_memory *memory) in nv40_instobj_release() argument 74 nv40_instobj_acquire(struct nvkm_memory *memory) in nv40_instobj_acquire() argument 76 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_acquire() [all …]
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/linux-5.10/arch/alpha/include/asm/ |
D | core_irongate.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 9 * IRONGATE is the internal name for the AMD-751 K7 core logic chipset 10 * which provides memory controller and PCI access for NAUTILUS-based 21 * The 21264 supports, and internally recognizes, a 44-bit physical 22 * address space that is divided equally between memory address space 23 * and I/O address space. Memory address space resides in the lower 30 * through the routines given is 32-bit. 38 igcsr32 dev_vendor; /* 0x00 - device ID, vendor ID */ 39 igcsr32 stat_cmd; /* 0x04 - status, command */ 40 igcsr32 class; /* 0x08 - class code, rev ID */ [all …]
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/linux-5.10/Documentation/arm64/ |
D | booting.rst | 13 (EL0 - EL3), with EL0 and EL1 having a secure and a non-secure 14 counterpart. EL2 is the hypervisor level and exists only in non-secure 33 --------------------------- 46 ------------------------- 50 The device tree blob (dtb) must be placed on an 8-byte boundary and must 59 ------------------------------ 71 ------------------------ 75 The decompressed kernel image contains a 64-byte header as follows:: 82 u64 res2 = 0; /* reserved */ 83 u64 res3 = 0; /* reserved */ [all …]
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/linux-5.10/include/uapi/drm/ |
D | exynos_drm.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 8 * Seung-Woo Kim <sw0312.kim@samsung.com> 26 * User-desired buffer creation information structure. 28 * @size: user-desired memory allocation size. 29 * - this size value would be page-aligned internally. 30 * @flags: user request for setting memory type or cache attributes. 32 * - this handle will be set by gem module of kernel side. 41 * A structure for getting a fake-offset that can be used with mmap. 44 * @reserved: just padding to be 64-bit aligned. 45 * @offset: a fake-offset of gem object. [all …]
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/linux-5.10/include/acpi/ |
D | actbl2.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 6 * Copyright (C) 2000 - 2020, Intel Corp. 31 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 33 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 40 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 46 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 49 * All tables must be byte-packed to match the ACPI specification, since 58 * does not specify the layout of bitfields in memory, which means they are 59 * essentially useless for dealing with packed data in on-disk formats or [all …]
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/linux-5.10/Documentation/xtensa/ |
D | atomctl.rst | 10 can do Atomic Transactions to the memory internally. 12 2. With and without An Intelligent Memory Controller which 19 On the FPGA Cards we typically simulate an Intelligent Memory controller 21 Memory controller we let it to the atomic operations internally while 22 doing a Cached (WB) transaction and use the Memory RCW for un-cached 25 For systems without an coherent cache controller, non-MX, we always 26 use the memory controllers RCW, thought non-MX controlers likely 29 CUSTOMER-WARNING: 30 Virtually all customers buy their memory controllers from vendors that 31 don't support atomic RCW memory transactions and will likely want to [all …]
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