Searched +full:reg +full:- +full:names (Results 776 – 800 of 2506) sorted by relevance
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/linux-5.10/arch/arm64/boot/dts/renesas/ |
D | r8a77980-v3hsk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 22 stdout-path = "serial0:115200n8"; 25 hdmi-out { 26 compatible = "hdmi-connector"; 31 remote-endpoint = <&adv7511_out>; 36 lvds-decoder { 38 vcc-supply = <&vcc3v3_d5>; 41 #address-cells = <1>; 42 #size-cells = <0>; [all …]
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/linux-5.10/Documentation/devicetree/bindings/media/ |
D | rockchip-vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/media/rockchip-vpu.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Ezequiel Garcia <ezequiel@collabora.com> 19 - rockchip,rk3288-vpu 20 - rockchip,rk3328-vpu 21 - rockchip,rk3399-vpu 23 reg: 30 interrupt-names: [all …]
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/linux-5.10/Documentation/devicetree/bindings/sound/ |
D | mchp,spdifrx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> 14 compliant with the IEC-60958 standard. 17 "#sound-dai-cells": 21 const: microchip,sama7g5-spdifrx 23 reg: 31 - description: Peripheral Bus Clock 32 - description: Generic Clock [all …]
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D | st,stm32-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Olivier Moysan <olivier.moysan@st.com> 19 - st,stm32h7-i2s 21 "#sound-dai-cells": 24 reg: 29 - description: clock feeding the peripheral bus interface. 30 - description: clock feeding the internal clock generator. [all …]
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D | st,stm32-sai.txt | 4 as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97. 5 The SAI contains two independent audio sub-blocks. Each sub-block has 9 - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai" 10 - reg: Base address and size of SAI common register set. 11 - clocks: Must contain phandle and clock specifier pairs for each entry 12 in clock-names. 13 - clock-names: Must contain "pclk" "x8k" and "x11k" 15 Mandatory for "st,stm32h7-sai" compatible. 16 Not used for "st,stm32f4-sai" compatible. 19 - interrupts: cpu DAI interrupt line shared by SAI sub-blocks [all …]
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D | rockchip,pdm.txt | 5 - compatible: "rockchip,pdm" 6 - "rockchip,px30-pdm" 7 - "rockchip,rk1808-pdm" 8 - "rockchip,rk3308-pdm" 9 - reg: physical base address of the controller and length of memory mapped 11 - dmas: DMA specifiers for rx dma. See the DMA client binding, 13 - dma-names: should include "rx". 14 - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. 15 - clock-names: should contain following: 16 - "pdm_hclk": clock for PDM BUS [all …]
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/linux-5.10/arch/arm/boot/dts/ |
D | armada-375-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F6720) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 14 #include "armada-375.dtsi" 18 compatible = "marvell,a375-db", "marvell,armada375"; 21 stdout-path = "serial0:115200n8"; 26 reg = <0x00000000 0x40000000>; /* 1 GB */ [all …]
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D | armada-370-mirabox.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include "armada-370.dtsi" 14 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp"; 17 stdout-path = "serial0:115200n8"; 22 reg = <0x00000000 0x20000000>; /* 512 MB */ 30 internal-regs { 35 clock-frequency = <600000000>; [all …]
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D | aspeed-bmc-opp-lanyang.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 /dts-v1/; 5 #include "aspeed-g5.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 10 compatible = "inventec,lanyang-bmc", "aspeed,ast2500"; 13 stdout-path = &uart5; 18 reg = <0x80000000 0x40000000>; 21 reserved-memory { 22 #address-cells = <1>; 23 #size-cells = <1>; [all …]
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D | s5pv210-aries.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 27 reg = <0x30000000 0x05000000 32 reserved-memory { 33 #address-cells = <1>; 34 #size-cells = <1>; 38 compatible = "shared-dma-pool"; 39 no-map; [all …]
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D | bcm283x.dtsi | 1 #include <dt-bindings/pinctrl/bcm2835.h> 2 #include <dt-bindings/clock/bcm2835.h> 3 #include <dt-bindings/clock/bcm2835-aux.h> 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include <dt-bindings/soc/bcm2835-pm.h> 8 /* firmware-provided startup stubs live here, where the secondary CPUs are 21 #address-cells = <1>; 22 #size-cells = <1>; 30 stdout-path = "serial0:115200n8"; [all …]
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D | at91-kizbox3_common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * at91-kizbox3.dts - Device Tree Include file for Overkiz Kizbox 3 12 /dts-v1/; 14 #include "sama5d2-pinfunc.h" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/mfd/atmel-flexcom.h> 17 #include <dt-bindings/pinctrl/at91.h> 18 #include <dt-bindings/pwm/pwm.h> 36 stdout-path = "serial1:115200n8"; 41 clock-frequency = <32768>; [all …]
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D | imx6qdl-emcon.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 or MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/pwm/pwm.h> 8 #include <dt-bindings/input/input.h> 12 model = "emtrion SoM emCON-MX6"; 13 compatible = "emtrion,emcon-mx6"; 23 stdout-path = &uart1; 28 reg = <0x10000000 0x40000000>; 31 gpio-keys { 32 compatible = "gpio-keys"; [all …]
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D | integratorcp.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 11 compatible = "arm,integrator-cp"; 18 #address-cells = <1>; 19 #size-cells = <0>; 30 reg = <0>; 35 operating-points = <50000 0 38 clock-names = "cpu"; 39 clock-latency = <1000000>; /* 1 ms */ 45 * ARM DUI 0184B page 7-28 "Integrator/CP922T system clocks" which [all …]
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/linux-5.10/Documentation/devicetree/bindings/spi/ |
D | amlogic,meson-gx-spicc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/spi/amlogic,meson-gx-spicc.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Neil Armstrong <narmstrong@baylibre.com> 14 - $ref: "spi-controller.yaml#" 17 The Meson SPICC is a generic SPI controller for general purpose Full-Duplex 23 - amlogic,meson-gx-spicc # SPICC controller on Amlogic GX and compatible SoCs 24 - amlogic,meson-axg-spicc # SPICC controller on Amlogic AXG and compatible SoCs 25 - amlogic,meson-g12a-spicc # SPICC controller on Amlogic G12A and compatible SoCs [all …]
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/linux-5.10/Documentation/devicetree/bindings/ata/ |
D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes 3 SATA host controller nodes are defined to describe on-chip Serial ATA 7 - compatible : Shall contain: 8 * "apm,xgene-ahci" 9 - reg : First memory resource shall be the AHCI memory 19 - interrupts : Interrupt-specifier for SATA host controller IRQ. 20 - clocks : Reference to the clock entry. 21 - phys : A list of phandles + phy-specifiers, one for each 22 entry in phy-names. 23 - phy-names : Should contain: [all …]
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D | ahci-st.txt | 6 - compatible : Must be "st,ahci" 7 - reg : Physical base addresses and length of register sets 8 - interrupts : Interrupt associated with the SATA device 9 - interrupt-names : Associated name must be; "hostc" 10 - clocks : The phandle for the clock 11 - clock-names : Associated name must be; "ahci_clk" 12 - phys : The phandle for the PHY port 13 - phy-names : Associated name must be; "ahci_phy" 16 - resets : The power-down, soft-reset and power-reset lines of SATA IP 17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst" [all …]
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/linux-5.10/Documentation/devicetree/bindings/net/ |
D | apm-xgene-enet.txt | 1 APM X-Gene SoC Ethernet nodes 3 Ethernet nodes are defined to describe on-chip ethernet interfaces in 4 APM X-Gene SoC. 7 - compatible: Should state binding information from the following list, 8 - "apm,xgene-enet": RGMII based 1G interface 9 - "apm,xgene1-sgenet": SGMII based 1G interface 10 - "apm,xgene1-xgenet": XFI based 10G interface 11 - reg: Address and length of the register set for the device. It contains the 12 information of registers in the same order as described by reg-names 13 - reg-names: Should contain the register set names [all …]
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/linux-5.10/arch/arm64/boot/dts/ti/ |
D | k3-j721e-common-proc-board.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include "k3-j721e-som-p0.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/net/ti-dp83867.h> 15 stdout-path = "serial2:115200n8"; 19 gpio_keys: gpio-keys { 20 compatible = "gpio-keys"; [all …]
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/linux-5.10/Documentation/devicetree/bindings/mmc/ |
D | socionext,uniphier-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 16 - socionext,uniphier-sd-v2.91 17 - socionext,uniphier-sd-v3.1 18 - socionext,uniphier-sd-v3.1.1 20 reg: 29 reset-names: [all …]
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/linux-5.10/Documentation/devicetree/bindings/mfd/ |
D | atmel-usart.txt | 4 - compatible: Should be one of the following: 5 - "atmel,at91rm9200-usart" 6 - "atmel,at91sam9260-usart" 7 - "microchip,sam9x60-usart" 8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart" 9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart" 10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart" 11 - reg: Should contain registers location and length 12 - interrupts: Should contain interrupt 13 - clock-names: tuple listing input clock names. [all …]
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/linux-5.10/Documentation/devicetree/bindings/clock/ |
D | clock-bindings.txt | 1 This binding is a work-in-progress, and are based on some experimental 10 value of a #clock-cells property in the clock provider node. 17 #clock-cells: Number of cells in a clock specifier; Typically 0 for nodes 22 clock-output-names: Recommended to be a list of strings of clock output signal 23 names indexed by the first cell in the clock specifier. 24 However, the meaning of clock-output-names is domain 30 specific names property. 33 the provider's clock-output-names property. 38 #clock-cells = <1>; 39 clock-output-names = "ckil", "ckih"; [all …]
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/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,wcnss-pil.txt | 6 - compatible: 10 "qcom,riva-pil", 11 "qcom,pronto-v1-pil", 12 "qcom,pronto-v2-pil" 14 - reg: 16 Value type: <prop-encoded-array> 20 - reg-names: 25 - interrupts-extended: 27 Value type: <prop-encoded-array> 29 ready, handover and stop-ack IRQs [all …]
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/linux-5.10/Documentation/devicetree/bindings/serial/ |
D | st-asc.txt | 1 *st-asc(Serial Port) 4 - compatible : Should be "st,asc". 5 - reg, reg-names, interrupts, interrupt-names : Standard way to define device 6 resources with names. look in 7 Documentation/devicetree/bindings/resource-names.txt 10 - st,hw-flow-ctrl bool flag to enable hardware flow control. 11 - st,force-m1 bool flat to force asc to be in Mode-1 recommeded 16 reg = <0xfe440000 0x2c>;
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/linux-5.10/Documentation/devicetree/bindings/pci/ |
D | designware-pcie.txt | 4 - compatible: 5 "snps,dw-pcie" for RC mode; 6 "snps,dw-pcie-ep" for EP mode; 7 - reg: For designware cores version < 4.80 contains the configuration 10 - reg-names: Must be "config" for the PCIe configuration space and "atu" for 15 - #address-cells: set to <3> 16 - #size-cells: set to <2> 17 - device_type: set to "pci" 18 - ranges: ranges for the PCI memory and I/O regions 19 - #interrupt-cells: set to <1> [all …]
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