boot/dts/armada-375-db.dts

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4  * (DB-88F6720)
8  * Gregory CLEMENT <gregory.clement@free-electrons.com>
9  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include "armada-375.dtsi"
18 	compatible = "marvell,a375-db", "marvell,armada375";
21 		stdout-path = "serial0:115200n8";
26 		reg = <0x00000000 0x40000000>; /* 1 GB */
57 	pinctrl-0 = <&spi0_pins>;
58 	pinctrl-names = "default";
67 	spi-flash@0 {
68 		#address-cells = <1>;
69 		#size-cells = <1>;
70 		compatible = "n25q128a13", "jedec,spi-nor";
71 		reg = <0>; /* Chip select 0 */
72 		spi-max-frequency = <108000000>;
78 	clock-frequency = <100000>;
79 	pinctrl-0 = <&i2c0_pins>;
80 	pinctrl-names = "default";
85 	clock-frequency = <100000>;
86 	pinctrl-0 = <&i2c1_pins>;
87 	pinctrl-names = "default";
95 	sdio_st_pins: sdio-st-pins {
103 	nr-ports = <2>;
108 	pinctrl-0 = <&nand_pins>;
109 	pinctrl-names = "default";
112 		reg = <0>;
113 		label = "pxa3xx_nand-0";
114 		nand-rb = <0>;
115 		marvell,nand-keep-config;
116 		nand-on-flash-bbt;
117 		nand-ecc-strength = <4>;
118 		nand-ecc-step-size = <512>;
121 			compatible = "fixed-partitions";
122 			#address-cells = <1>;
123 			#size-cells = <1>;
126 				label = "U-Boot";
127 				reg = <0 0x800000>;
131 				reg = <0x800000 0x800000>;
135 				reg = <0x1000000 0x3f000000>;
150 	pinctrl-0 = <&sdio_pins &sdio_st_pins>;
151 	pinctrl-names = "default";
153 	cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
154 	wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
158 	phy0: ethernet-phy@0 {
159 		reg = <0>;
162 	phy3: ethernet-phy@3 {
163 		reg = <3>;
175 	phy-mode = "rgmii-id";
181 	phy-mode = "gmii";