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/linux-5.10/Documentation/devicetree/bindings/phy/
Dsocionext,uniphier-usb3hs-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 High-Speed (HS) PHY
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about High-Speed PHY.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro5-usb3-hsphy
22 - socionext,uniphier-pxs2-usb3-hsphy
[all …]
Dqcom,qmp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
20 - qcom,ipq8074-qmp-pcie-phy
21 - qcom,ipq8074-qmp-usb3-phy
22 - qcom,msm8996-qmp-pcie-phy
23 - qcom,msm8996-qmp-ufs-phy
24 - qcom,msm8996-qmp-usb3-phy
[all …]
Dphy-rockchip-inno-usb2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-usb2phy
16 - rockchip,rk3228-usb2phy
17 - rockchip,rk3328-usb2phy
18 - rockchip,rk3366-usb2phy
19 - rockchip,rk3399-usb2phy
[all …]
Dsocionext,uniphier-ahci-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19 - socionext,uniphier-pxs2-ahci-phy
20 - socionext,uniphier-pxs3-ahci-phy
22 reg:
25 "#phy-cells":
31 clock-names:
[all …]
Dsocionext,uniphier-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19 - socionext,uniphier-pro5-pcie-phy
20 - socionext,uniphier-ld20-pcie-phy
21 - socionext,uniphier-pxs3-pcie-phy
23 reg:
26 "#phy-cells":
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <heiko@sntech.de>
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
23 - rockchip,rk3036-vop
24 - rockchip,rk3066-vop
[all …]
/linux-5.10/arch/arm/boot/dts/
Daspeed-bmc-lenovo-hr630.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
35 reg = <0x80000000 0x20000000>;
38 reserved-memory {
39 #address-cells = <1>;
[all …]
Dqcom-pm8941.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/iio/qcom,spmi-vadc.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/spmi/spmi.h>
9 compatible = "qcom,pm8941", "qcom,spmi-pmic";
10 reg = <0x0 SPMI_USID>;
11 #address-cells = <1>;
12 #size-cells = <0>;
15 compatible = "qcom,pm8941-rtc";
16 reg = <0x6000>,
[all …]
Dimx28-duckbill.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2013-2014,2016 Michael Heimpold <mhei@heimpold.de>
4 * Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
17 reg = <0x40000000 0x08000000>;
23 compatible = "fsl,imx28-mmc";
24 pinctrl-names = "default";
25 pinctrl-0 = <&mmc0_4bit_pins_a
27 bus-width = <4>;
[all …]
Dvexpress-v2p-ca15-tc1.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
8 * HBI-0237A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15";
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]
Dimx6qdl-udoo.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 stdout-path = &uart2;
21 compatible = "gpio-backlight";
23 default-on;
27 gpio-poweroff {
28 compatible = "gpio-poweroff";
30 pinctrl-0 = <&pinctrl_power_off>;
31 pinctrl-names = "default";
36 reg = <0x10000000 0x40000000>;
41 * in reality it is a -20t (parallel) model,
[all …]
Dimx27-phytec-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
11 compatible = "phytec,imx27-pcm038", "fsl,imx27";
15 reg = <0xa0000000 0x08000000>;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "regulator-fixed";
25 reg = <0>;
26 regulator-name = "3V3";
[all …]
Dimx6qdl-tx6.dtsi2 * Copyright 2014-2017 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/input/input.h>
44 #include <dt-bindings/interrupt-controller/irq.h>
45 #include <dt-bindings/pwm/pwm.h>
46 #include <dt-bindings/sound/fsl-imx-audmux.h>
53 lcdif-23bit-pins-a = &pinctrl_disp0_1;
54 lcdif-24bit-pins-a = &pinctrl_disp0_2;
57 reg-can-xcvr = &reg_can_xcvr;
[all …]
Dsama5d3xmb.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
20 reg = <0>;
21 bus-width = <4>;
22 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
31 spi-max-frequency = <50000000>;
32 reg = <0>;
37 atmel,clk-from-rk-pin;
[all …]
Dimx6sx-sabreauto.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
11 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
15 reg = <0x80000000 0x80000000>;
19 compatible = "gpio-leds";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_led>;
26 linux,default-trigger = "heartbeat";
30 vcc_sd3: regulator-vcc-sd3 {
31 compatible = "regulator-fixed";
[all …]
Decx-2000.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
6 /dts-v1/;
12 model = "Calxeda ECX-2000";
13 compatible = "calxeda,ecx-2000";
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a15";
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Drenesas,lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car LVDS Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
21 - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-mod0-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
20 - allwinner,sun4i-a10-mod0-clk
21 - allwinner,sun9i-a80-mod0-clk
23 # The PRCM on the A31 and A23 will have the reg property missing,
27 - compatible
[all …]
/linux-5.10/Documentation/devicetree/bindings/soc/ti/
Dkeystone-navigator-dma.txt13 ------------------
15 ------------------
17 |-> DMA instance #0
19 |-> DMA instance #1
23 |-> DMA instance #n
27 - compatible: Should be "ti,keystone-navigator-dma"
28 - clocks: phandle to dma instances clocks. The clock handles can be as
31 - ti,navigator-cloud-address: Should contain base address for the multi-core
42 - reg: Should contain register location and length of the following dma
45 - Global control register region (global).
[all …]
/linux-5.10/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-usb.dtsi1 // SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)
6 compatible = "simple-bus";
7 dma-ranges;
8 #address-cells = <2>;
9 #size-cells = <2>;
12 usbphy0: usb-phy@0 {
13 compatible = "brcm,sr-usb-combo-phy";
14 reg = <0x0 0x00000000 0x0 0x100>;
15 #phy-cells = <1>;
20 compatible = "generic-xhci";
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/exynos/
Dexynos-mic.txt1 Device-Tree bindings for Samsung Exynos SoC mobile image compressor (MIC)
10 - compatible: value should be "samsung,exynos5433-mic".
11 - reg: physical base address and length of the MIC registers set and system
13 - clocks: must include clock specifiers corresponding to entries in the
14 clock-names property.
15 - clock-names: list of clock names sorted in the same order as the clocks
17 - samsung,disp-syscon: the reference node for syscon for DISP block.
18 - ports: contains a port which is connected to decon node and dsi node.
19 address-cells and size-cells must 1 and 0, respectively.
20 - port: contains an endpoint node which is connected to the endpoint in the
[all …]
/linux-5.10/arch/arm64/boot/dts/arm/
Dfoundation-v8.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 model = "Foundation-v8A";
16 compatible = "arm,foundation-aarch64", "arm,vexpress";
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
31 #address-cells = <2>;
32 #size-cells = <0>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/
Dallwinner,sun6i-a31-mipi-dsi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 MIPI-DSI Controller Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun6i-a31-mipi-dsi
17 - allwinner,sun50i-a64-mipi-dsi
19 reg:
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Dlantiq-gswip.txt6 - compatible : "lantiq,xrx200-gswip" for the embedded GSWIP in the
8 - reg : memory range of the GSWIP core registers
17 - compatible : "lantiq,xrx200-mdio" for the MDIO bus inside the GSWIP
25 - compatible : "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"
26 "lantiq,xrx300-gphy-fw", "lantiq,gphy-fw"
27 "lantiq,xrx330-gphy-fw", "lantiq,gphy-fw"
30 - lantiq,rcu : reference to the rcu syscon
35 - reg : Offset of the GPHY firmware register in the RCU
37 - resets : list of resets of the embedded GPHY
38 - reset-names : list of names of the resets
[all …]
/linux-5.10/Documentation/devicetree/bindings/mmc/
Dingenic,mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: mmc-controller.yaml#
18 - enum:
19 - ingenic,jz4740-mmc
20 - ingenic,jz4725b-mmc
21 - ingenic,jz4760-mmc
22 - ingenic,jz4780-mmc
[all …]

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