dts/arm/foundation-v8.dtsi

1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 	model = "Foundation-v8A";
16 	compatible = "arm,foundation-aarch64", "arm,vexpress";
17 	interrupt-parent = <&gic>;
18 	#address-cells = <2>;
19 	#size-cells = <2>;
31 		#address-cells = <2>;
32 		#size-cells = <0>;
37 			reg = <0x0 0x0>;
38 			next-level-cache = <&L2_0>;
43 			reg = <0x0 0x1>;
44 			next-level-cache = <&L2_0>;
49 			reg = <0x0 0x2>;
50 			next-level-cache = <&L2_0>;
55 			reg = <0x0 0x3>;
56 			next-level-cache = <&L2_0>;
59 		L2_0: l2-cache0 {
66 		reg = <0x00000000 0x80000000 0 0x80000000>,
71 		compatible = "arm,armv8-timer";
76 		clock-frequency = <100000000>;
80 		compatible = "arm,armv8-pmuv3";
88 		compatible = "arm,sbsa-gwdt";
89 		reg = <0x0 0x2a440000 0 0x1000>,
92 		timeout-sec = <30>;
96 		compatible = "fixed-clock";
97 		#clock-cells = <0>;
98 		clock-frequency = <24000000>;
99 		clock-output-names = "v2m:clk24mhz";
103 		compatible = "fixed-clock";
104 		#clock-cells = <0>;
105 		clock-frequency = <1000000>;
106 		clock-output-names = "v2m:refclk1mhz";
110 		compatible = "fixed-clock";
111 		#clock-cells = <0>;
112 		clock-frequency = <32768>;
113 		clock-output-names = "v2m:refclk32khz";
117 		compatible = "arm,vexpress,v2m-p1", "simple-bus";
118 		arm,v2m-memory-map = "rs1";
119 		#address-cells = <2>; /* SMB chipselect number and offset */
120 		#size-cells = <1>;
129 		#interrupt-cells = <1>;
130 		interrupt-map-mask = <0 0 63>;
131 		interrupt-map = <0 0  0 &gic 0 GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH>,
177 			reg = <2 0x02000000 0x10000>;
181 		iofpga-bus@300000000 {
182 			compatible = "simple-bus";
183 			#address-cells = <1>;
184 			#size-cells = <1>;
188 				compatible = "arm,vexpress-sysreg";
189 				reg = <0x010000 0x1000>;
194 				reg = <0x090000 0x1000>;
197 				clock-names = "uartclk", "apb_pclk";
202 				reg = <0x0a0000 0x1000>;
205 				clock-names = "uartclk", "apb_pclk";
210 				reg = <0x0b0000 0x1000>;
213 				clock-names = "uartclk", "apb_pclk";
218 				reg = <0x0c0000 0x1000>;
221 				clock-names = "uartclk", "apb_pclk";
224 			virtio-block@130000 {
226 				reg = <0x130000 0x200>;