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/linux-5.10/arch/arm/boot/dts/
Dhip01.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
12 interrupt-parent = <&gic>;
13 #address-cells = <1>;
14 #size-cells = <1>;
16 gic: interrupt-controller@1e001000 {
17 compatible = "arm,cortex-a9-gic";
18 #interrupt-cells = <3>;
19 #address-cells = <0>;
20 interrupt-controller;
21 reg = <0x1a001000 0x1000>, <0x1a000100 0x1000>;
[all …]
Dam335x-moxa-uc-2100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/
13 vbat: vbat-regulator {
14 compatible = "regulator-fixed";
18 vmmcsd_fixed: vmmcsd-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "vmmcsd_fixed";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-boot-on;
[all …]
Dvf610-zii-ssmb-dtu.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 * SSMB - SPU3 Switch Management Board
7 * DTU - Digital Tapping Unit
9 * Copyright (C) 2015-2019 Zodiac Inflight Innovations
11 * Based on an original 'vf610-twr.dts' which is Copyright 2015,
15 /dts-v1/;
23 stdout-path = &uart0;
28 reg = <0x80000000 0x20000000>;
31 gpio-leds {
32 compatible = "gpio-leds";
[all …]
Dr8a7778.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M1A (R8A77781) SoC
14 #include <dt-bindings/clock/r8a7778-clock.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
20 interrupt-parent = <&gic>;
21 #address-cells = <1>;
22 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
Dimx6qdl-gw551x.dtsi4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/media/tda1997x.h>
50 #include <dt-bindings/input/linux-event-codes.h>
51 #include <dt-bindings/interrupt-controller/irq.h>
52 #include <dt-bindings/sound/fsl-imx-audmux.h>
68 gpio-keys {
69 compatible = "gpio-keys";
70 #address-cells = <1>;
[all …]
Dimx6qdl-rex.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 stdout-path = &uart1;
17 compatible = "simple-bus";
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "regulator-fixed";
23 reg = <0>;
24 regulator-name = "3P3V";
[all …]
Dmt8135.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8135-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/mt8135-resets.h>
12 #include "mt8135-pinfunc.h"
15 #address-cells = <2>;
16 #size-cells = <2>;
18 interrupt-parent = <&sysirq>;
20 cpu-map {
[all …]
Dimx6q-prtwd2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
8 #include "imx6qdl-prti6q.dtsi"
9 #include <dt-bindings/leds/common.h>
17 reg = <0x10000000 0x20000000>;
22 reg = <0x80000000 0x20000000>;
26 compatible = "mmc-pwrseq-simple";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_wifi_npd>;
29 reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
[all …]
Darmada-385-synology-ds116.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include "armada-385.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380";
17 stdout-path = "serial0:115200n8";
22 reg = <0x00000000 0x40000000>; /* 1 GB */
32 internal-regs {
34 pinctrl-names = "default";
35 pinctrl-0 = <&i2c0_pins>;
[all …]
Dimx6q-gw5400-a.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
11 model = "Gateworks Ventana GW5400-A";
12 compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
33 compatible = "gpio-leds";
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_gpio_leds>;
39 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
40 default-state = "on";
[all …]
Dr8a77470-iwg23s-sbc.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1C single board computer
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 model = "iWave iW-RainboW-G23S single board computer based on RZ/G1C";
22 stdout-path = "serial1:115200n8";
25 hdmi-out {
26 compatible = "hdmi-connector";
31 remote-endpoint = <&bridge_out>;
38 reg = <0 0x40000000 0 0x20000000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/ti/
Dti,omap3-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap3-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - Video ports:
19 - Port 0: DPI output
20 - Port 1: SDI output
[all …]
/linux-5.10/Documentation/devicetree/bindings/pci/
Drcar-pci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/
4 ---
5 $id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car PCIe Endpoint
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
12 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
17 - enum:
18 - renesas,r8a774a1-pcie-ep # RZ/G2M
[all …]
Dcdns,cdns-pcie-ep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: "cdns-pcie-ep.yaml#"
14 - $ref: "pci-ep.yaml#"
18 const: cdns,cdns-pcie-ep
20 reg:
23 reg-names:
[all …]
Dsamsung,exynos5440-pcie.txt4 and thus inherits all the common properties defined in designware-pcie.txt.
7 - compatible: "samsung,exynos5440-pcie"
8 - reg: base addresses and lengths of the PCIe controller,
9 - reg-names : First name should be set to "elbi".
12 NOTE: When using the "config" property, reg-names must be set.
13 - interrupts: A list of interrupt outputs for level interrupt,
15 - phys: From PHY binding. Phandle for the generic PHY.
16 Refer to Documentation/devicetree/bindings/phy/samsung-phy.txt
19 Documentation/devicetree/bindings/pci/designware-pcie.txt
23 SoC-specific DT Entry (with using PHY framework):
[all …]
Duniphier-pcie.txt9 Documentation/devicetree/bindings/pci/designware-pcie.txt.
12 - compatible: Should be "socionext,uniphier-pcie".
13 - reg: Specifies offset and length of the register set for the device.
14 According to the reg-names, appropriate register sets are required.
15 - reg-names: Must include the following entries:
16 "dbi" - controller configuration registers
17 "link" - SoC-specific glue layer registers
18 "config" - PCIe configuration space
19 "atu" - iATU registers for DWC version 4.80 or later
20 - clocks: A phandle to the clock gate for PCIe glue layer including
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Ddw_hdmi-rockchip.txt9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3399-dw-hdmi"
19 - reg: See dw_hdmi.txt.
20 - reg-io-width: See dw_hdmi.txt. Shall be 4.
21 - interrupts: HDMI interrupt number
22 - clocks: See dw_hdmi.txt.
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/
Dbrcm,bcm7445-switch-v4.0.txt5 - compatible: should be one of
6 "brcm,bcm7445-switch-v4.0"
7 "brcm,bcm7278-switch-v4.0"
8 "brcm,bcm7278-switch-v4.8"
9 - reg: addresses and length of the register sets for the device, must be 6
11 - interrupts: interrupts for the devices, must be two interrupts
12 - #address-cells: must be 1, see dsa/dsa.txt
13 - #size-cells: must be 0, see dsa/dsa.txt
17 - dsa,mii-bus: phandle to the MDIO bus controller, see dsa/dsa.txt
18 - dsa,ethernet: phandle to the CPU network interface controller, see dsa/dsa.txt
[all …]
Dqcom,ipa.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alex Elder <elder@kernel.org>
21 and has a distinct interrupt and a separately-defined address space.
28 - |
29 -------- ---------
31 | AP +<---. .----+ Modem |
32 | +--. | | .->+ |
34 -------- | | | | ---------
[all …]
/linux-5.10/arch/mips/boot/dts/ingenic/
Dci20.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
22 stdout-path = &uart4;
27 reg = <0x0 0x10000000
31 gpio-keys {
[all …]
/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
25 stdout-path = "serial0:115200n8";
31 proc-supply = <&mt6380_vcpu_reg>;
32 sram-supply = <&mt6380_vm_reg>;
36 proc-supply = <&mt6380_vcpu_reg>;
37 sram-supply = <&mt6380_vm_reg>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/sound/
Ddavinci-mcasp-audio.txt4 - compatible :
5 "ti,dm646x-mcasp-audio" : for DM646x platforms
6 "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms
7 "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, AM43xx, TI81xx)
8 "ti,dra7-mcasp-audio" : for DRA7xx platforms
10 - reg : Should contain reg specifiers for the entries in the reg-names property.
11 - reg-names : Should contain:
15 - op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF,
16 IEC60958-1, and AES-3 formats.
17 - tdm-slots : Slots for TDM operation. Indicates number of channels transmitted
[all …]
/linux-5.10/Documentation/devicetree/bindings/spi/
Dst,stm32-qspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@st.com>
11 - Patrice Chotard <patrice.chotard@st.com>
14 - $ref: "spi-controller.yaml#"
18 const: st,stm32f469-qspi
20 reg:
22 - description: registers
[all …]
/linux-5.10/arch/arc/boot/dts/
Dabilis_tb101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
Dabilis_tb100.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]

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