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/linux-6.8/arch/arm/boot/dts/qcom/
Dpmx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/iio/qcom,spmi-vadc.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/spmi/spmi.h>
14 compatible = "qcom,pmx55", "qcom,spmi-pmic";
15 reg = <0x8 SPMI_USID>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "qcom,pm8916-pon";
[all …]
/linux-6.8/arch/arm64/boot/dts/amlogic/
Dmeson-sm1-ac2xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 #include "meson-sm1.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/gpio/meson-g12a-gpio.h>
14 #include <dt-bindings/input/input.h>
23 stdout-path = "serial0:115200n8";
26 emmc_pwrseq: emmc-pwrseq {
27 compatible = "mmc-pwrseq-emmc";
28 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
31 cvbs-connector {
[all …]
/linux-6.8/arch/arm64/boot/dts/qcom/
Dpm2250.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/iio/qcom,spmi-vadc.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/spmi/spmi.h>
13 compatible = "qcom,pm2250", "qcom,spmi-pmic";
14 reg = <0x0 SPMI_USID>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "qcom,pm8916-pon";
[all …]
Dpmi8950.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/iio/qcom,spmi-vadc.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/spmi/spmi.h>
10 compatible = "qcom,pmi8950", "qcom,spmi-pmic";
11 reg = <0x2 SPMI_USID>;
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "qcom,spmi-vadc";
17 reg = <0x3100>;
[all …]
Dsm4250-oneplus-billie2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
15 qcom,msm-id = <0x1a1 0x10000 0x1bc 0x10000>;
16 qcom,board-id = <0x1000b 0x00>;
22 #address-cells = <2>;
23 #size-cells = <2>;
26 stdout-path = "framebuffer0";
29 compatible = "simple-framebuffer";
30 reg = <0 0x5c000000 0 (1600 * 720 * 4)>;
41 reg = <0x0 0x5fff7000 0x0 0x8000>;
[all …]
Dpmi8994.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/irq.h>
3 #include <dt-bindings/spmi/spmi.h>
8 compatible = "qcom,pmi8994", "qcom,spmi-pmic";
9 reg = <0x2 SPMI_USID>;
10 #address-cells = <1>;
11 #size-cells = <0>;
14 compatible = "qcom,pmi8994-gpio", "qcom,spmi-gpio";
15 reg = <0xc000>;
16 gpio-controller;
[all …]
/linux-6.8/arch/arm/boot/dts/microchip/
Dtny_a9263.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * usb_a9263.dts - Device Tree file for Caloa USB A9293 board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
12 compatible = "atmel,tny-a9263", "atmel,at91sam9263", "atmel,at91sam9";
19 reg = <0x20000000 0x4000000>;
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
40 compatible = "atmel,tcb-timer";
41 reg = <0>, <1>;
[all …]
Dat91-ariettag25.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
15 stdout-path = "serial0:115200n8";
19 reg = <0x20000000 0x8000000>;
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
33 compatible = "gpio-leds";
38 linux,default-trigger = "heartbeat";
48 pinctrl-0 = <
51 pinctrl-names = "default";
[all …]
/linux-6.8/arch/arm/boot/dts/ti/omap/
Dam335x-regor.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 model = "Phytec AM335x phyBOARD-REGOR";
10 compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx";
13 compatible = "regulator-fixed";
14 regulator-name = "vcc3v3";
15 regulator-min-microvolt = <3300000>;
16 regulator-max-microvolt = <3300000>;
17 regulator-boot-on;
21 user_leds: user-leds {
22 compatible = "gpio-leds";
[all …]
/linux-6.8/Documentation/devicetree/bindings/clock/
Dqcom,gcc-msm8660.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8660.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
18 include/dt-bindings/clock/qcom,gcc-msm8660.h
19 include/dt-bindings/reset/qcom,gcc-msm8660.h
22 - $ref: qcom,gcc.yaml#
27 - qcom,gcc-msm8660
[all …]
Dsunplus,sp7021-clkc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/sunplus,sp7021-clkc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Qin Jian <qinjian@cqplus1.com>
15 const: sunplus,sp7021-clkc
17 reg:
23 "#clock-cells":
27 - compatible
28 - reg
[all …]
Drockchip,rk3328-cru.txt9 - compatible: should be "rockchip,rk3328-cru"
10 - reg: physical base address of the controller and length of memory mapped
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
17 - rockchip,grf: phandle to the syscon managing the "general register files"
22 preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be
30 clock-output-names:
31 - "xin24m" - crystal input - required,
32 - "clkin_i2s" - external I2S clock - optional,
33 - "gmac_clkin" - external GMAC clock - optional
[all …]
/linux-6.8/arch/arm/boot/dts/samsung/
Dexynos5250-snow.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include "exynos5250-snow-common.dtsi"
13 compatible = "google,snow-rev4", "google,snow", "samsung,exynos5250",
15 chassis-type = "laptop";
18 compatible = "google,snow-audio-max98095";
20 samsung,model = "Snow-I2S-MAX98095";
21 samsung,audio-codec = <&max98095>;
24 sound-dai = <&i2s0 0>;
28 sound-dai = <&max98095 0>, <&hdmi>;
[all …]
/linux-6.8/drivers/gpio/
Dgpio-regmap.c1 // SPDX-License-Identifier: GPL-2.0-only
34 unsigned int offset, unsigned int *reg,
50 unsigned int *reg, unsigned int *mask) in gpio_regmap_simple_xlate() argument
52 unsigned int line = offset % gpio->ngpio_per_reg; in gpio_regmap_simple_xlate()
53 unsigned int stride = offset / gpio->ngpio_per_reg; in gpio_regmap_simple_xlate()
55 *reg = base + stride * gpio->reg_stride; in gpio_regmap_simple_xlate()
64 unsigned int base, val, reg, mask; in gpio_regmap_get() local
68 if (gpio->reg_dat_base) in gpio_regmap_get()
69 base = gpio_regmap_addr(gpio->reg_dat_base); in gpio_regmap_get()
71 base = gpio_regmap_addr(gpio->reg_set_base); in gpio_regmap_get()
[all …]
/linux-6.8/Documentation/devicetree/bindings/mfd/
Dfsl-imx25-tsadc.txt7 - compatible: Should be "fsl,imx25-tsadc".
8 - reg: Start address and size of the memory area of
10 - interrupts: Interrupt for this device
11 (See: ../interrupt-controller/interrupts.txt)
12 - clocks: An 'ipg' clock (See: ../clock/clock-bindings.txt)
13 - interrupt-controller: This device is an interrupt controller. It
16 - #interrupt-cells: Should be '<1>'.
17 - #address-cells: Should be '<1>'.
18 - #size-cells: Should be '<1>'.
25 compatible = "fsl,imx25-tsadc";
[all …]
/linux-6.8/Documentation/devicetree/bindings/reset/
Dbrcm,brcmstb-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/brcm,brcmstb-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom STB SW_INIT-style reset controller
10 Broadcom STB SoCs have a SW_INIT-style reset controller with separate
18 - Florian Fainelli <f.fainelli@gmail.com>
22 const: brcm,brcmstb-reset
24 reg:
27 "#reset-cells":
[all …]
/linux-6.8/Documentation/devicetree/bindings/input/touchscreen/
Dcypress,tt21000.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Alistair Francis <alistair@alistair23.me>
16 - $ref: touchscreen.yaml#
22 reg:
25 '#address-cells':
28 '#size-cells':
34 vdd-supply:
37 vddio-supply:
[all …]
/linux-6.8/arch/arm64/boot/dts/renesas/
Dr8a779m1-salvator-xs.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the Salvator-X 2nd version board with R-Car H3e-2G
7 * Based on r8a77951-salvator-xs.dts
8 * Copyright (C) 2015-2017 Renesas Electronics Corp.
11 /dts-v1/;
13 #include "salvator-xs.dtsi"
16 model = "Renesas Salvator-X 2nd version board based on r8a779m1";
17 compatible = "renesas,salvator-xs", "renesas,r8a779m1",
23 reg = <0x0 0x48000000 0x0 0x38000000>;
28 reg = <0x5 0x00000000 0x0 0x40000000>;
[all …]
Dr8a779m1-ulcb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) with R-Car H3e-2G
7 * Based on r8a77951-ulcb.dts
13 /dts-v1/;
24 reg = <0x0 0x48000000 0x0 0x38000000>;
29 reg = <0x5 0x00000000 0x0 0x40000000>;
34 reg = <0x6 0x00000000 0x0 0x40000000>;
39 reg = <0x7 0x00000000 0x0 0x40000000>;
52 clock-names = "du.0", "du.1", "du.2", "du.3",
Dr8a77961-ulcb.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W+
8 /dts-v1/;
19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
29 reg = <0x6 0x00000000 0x1 0x00000000>;
40 clock-names = "du.0", "du.1", "du.2",
/linux-6.8/arch/arm/boot/dts/st/
Dspear300.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #address-cells = <1>;
13 #size-cells = <1>;
14 compatible = "simple-bus";
19 compatible = "st,spear300-pinmux";
20 reg = <0x99000000 0x1000>;
25 reg = <0x60000000 0x1000>;
31 compatible = "st,spear600-fsmc-nand";
32 #address-cells = <1>;
33 #size-cells = <1>;
[all …]
/linux-6.8/drivers/clk/sunxi/
Dclk-sun4i-pll3.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
8 #include <linux/clk-provider.h>
23 const char *clk_name = node->name, *parent; in sun4i_a10_pll3_setup()
27 void __iomem *reg; in sun4i_a10_pll3_setup() local
31 of_property_read_string(node, "clock-output-names", &clk_name); in sun4i_a10_pll3_setup()
34 reg = of_io_request_and_map(node, 0, of_node_full_name(node)); in sun4i_a10_pll3_setup()
35 if (IS_ERR(reg)) { in sun4i_a10_pll3_setup()
44 gate->reg = reg; in sun4i_a10_pll3_setup()
45 gate->bit_idx = SUN4I_A10_PLL3_GATE_BIT; in sun4i_a10_pll3_setup()
[all …]
/linux-6.8/Documentation/devicetree/bindings/media/i2c/
Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
[all …]
/linux-6.8/drivers/clk/renesas/
Dclk-r8a7740.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
33 unsigned int reg; member
67 unsigned int shift, reg; in r8a7740_cpg_register_clock() local
121 for (c = div4_clks; c->name; c++) { in r8a7740_cpg_register_clock()
122 if (!strcmp(name, c->name)) { in r8a7740_cpg_register_clock()
125 reg = c->reg; in r8a7740_cpg_register_clock()
126 shift = c->shift; in r8a7740_cpg_register_clock()
130 if (!c->name) in r8a7740_cpg_register_clock()
131 return ERR_PTR(-EINVAL); in r8a7740_cpg_register_clock()
[all …]
/linux-6.8/arch/arm/boot/dts/hisilicon/
Dhisi-x5hd2-dkb.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014 Linaro Ltd.
4 * Copyright (c) 2013-2014 HiSilicon Limited.
7 /dts-v1/;
8 #include "hisi-x5hd2.dtsi"
15 stdout-path = "serial0:115200n8";
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "hisilicon,hix5hd2-smp";
24 compatible = "arm,cortex-a9";
[all …]

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