| /linux-5.10/drivers/clocksource/ |
| D | nomadik-mtu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 Linus Walleij for ST-Ericsson
25 * registers. These are register names.
33 /* per-timer registers take 0..3 as argument */
36 #define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */
41 #define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
66 static u32 nmdk_cycle; /* write-once */
79 return -readl(mtu_base + MTU_VAL(0)); in nomadik_read_sched_clock()
87 /* Clockevent device: use one-shot mode */
103 /* Timer: configure load and background-load, and fire it up */ in nmdk_clkevt_reset()
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| /linux-5.10/tools/perf/Documentation/ |
| D | perf-probe.txt | 1 perf-probe(1)
5 ----
6 perf-probe - Define new dynamic tracepoints
9 --------
11 'perf probe' [options] --add='PROBE' [...]
15 'perf probe' [options] --del='[GROUP:]EVENT' [...]
17 'perf probe' --list[=[GROUP:]EVENT]
19 'perf probe' [options] --line='LINE'
21 'perf probe' [options] --vars='PROBEPOINT'
23 'perf probe' [options] --funcs
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| /linux-5.10/arch/arm/boot/dts/ |
| D | hi3620-hi4511.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013 Linaro Ltd.
7 /dts-v1/;
13 compatible = "hisilicon,hi3620-hi4511";
17 stdout-path = "serial0:115200n8";
22 reg = <0x40000000 0x20000000>;
31 pinctrl-names = "default", "idle";
32 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
33 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
38 pinctrl-names = "default", "idle";
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| D | sun8i-t3-cqa3t-bv3.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
47 #include "sun8i-r40.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
52 model = "t3-cqa3t-bv3";
53 compatible = "qihua,t3-cqa3t-bv3", "allwinner,sun8i-t3",
54 "allwinner,sun8i-r40";
61 stdout-path = "serial0:115200n8";
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| D | sun8i-a33-olinuxino.dts | 2 * Copyright 2016 - Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
5 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
45 #include "sun8i-a33.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
48 #include <dt-bindings/input/input.h>
51 model = "Olimex A33-OLinuXino";
52 compatible = "olimex,a33-olinuxino","allwinner,sun8i-a33";
59 stdout-path = "serial0:115200n8";
63 compatible = "gpio-leds";
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| D | tegra20-harmony.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
22 reg = <0x00000000 0x40000000>;
37 hdmi-supply = <&vdd_5v0_hdmi>;
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
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| /linux-5.10/drivers/net/ethernet/amd/xgbe/ |
| D | xgbe-phy-v1.c | 70 * names of its contributors may be used to endorse or promote products
125 #include "xgbe-common.h"
127 #define XGBE_BLWC_PROPERTY "amd,serdes-blwc"
128 #define XGBE_CDR_RATE_PROPERTY "amd,serdes-cdr-rate"
129 #define XGBE_PQ_SKEW_PROPERTY "amd,serdes-pq-skew"
130 #define XGBE_TX_AMP_PROPERTY "amd,serdes-tx-amp"
131 #define XGBE_DFE_CFG_PROPERTY "amd,serdes-dfe-tap-config"
132 #define XGBE_DFE_ENA_PROPERTY "amd,serdes-dfe-tap-enable"
165 /* Rate-change complete wait/retry count */
234 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an_outcome()
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| /linux-5.10/drivers/firewire/ |
| D | core-transaction.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2004-2006 Kristian Hoegsberg <krh@bitplanet.net>
13 #include <linux/firewire-constants.h>
67 if (t->is_split_transaction) in try_cancel_split_timeout()
68 return del_timer(&t->split_timeout_timer); in try_cancel_split_timeout()
79 spin_lock_irqsave(&card->lock, flags); in close_transaction()
80 list_for_each_entry(t, &card->transaction_list, link) { in close_transaction()
83 spin_unlock_irqrestore(&card->lock, flags); in close_transaction()
86 list_del_init(&t->link); in close_transaction()
87 card->tlabel_mask &= ~(1ULL << t->tlabel); in close_transaction()
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| /linux-5.10/Documentation/process/ |
| D | coding-style.rst | 19 --------------
31 Now, some people will claim that having 8-character indentations makes
33 80-character terminal screen. The answer to that is that if you need
37 In short, 8-char indents make things easier to read, and have the added
43 instead of ``double-indenting`` the ``case`` labels. E.g.:
45 .. code-block:: c
67 .. code-block:: c
82 ----------------------------------
99 However, never break user-visible strings such as printk messages because
104 ----------------------------
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| /linux-5.10/drivers/staging/comedi/drivers/ |
| D | ni_tio.c | 1 // SPDX-License-Identifier: GPL-2.0+
11 * Author: J.P. Mellor <jpmellor@rose-hulman.edu>,
19 * This module is not used directly by end-users. Rather, it
26 * DAQ 660x Register-Level Programmer Manual (NI 370505A-01)
27 * DAQ 6601/6602 User Manual (NI 322137B-01)
28 * 340934b.pdf DAQ-STC reference manual
133 switch (counter_dev->variant) { in ni_tio_has_gate2_registers()
144 * ni_tio_write() - Write a TIO register using the driver provided callback.
147 * @reg: the register to write.
150 enum ni_gpct_register reg) in ni_tio_write() argument
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| /linux-5.10/drivers/rtc/ |
| D | rtc-pcf85063.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Maintainers: http://www.nslu2-linux.org/
12 #include <linux/clk-provider.h>
27 * PCF85063A -- Rev. 6 — 18 November 2015
28 * PCF85063TP -- Rev. 4 — 6 May 2015
30 * https://www.microcrystal.com/fileadmin/Media/Products/RTC/App.Manual/RV-8263-C7_App-Manual.pdf
31 * RV8263 -- Rev. 1.0 — January 2019
86 rc = regmap_bulk_read(pcf85063->regmap, PCF85063_REG_SC, regs, in pcf85063_rtc_read_time()
93 dev_warn(&pcf85063->rtc->dev, "Power loss detected, invalid time\n"); in pcf85063_rtc_read_time()
94 return -EINVAL; in pcf85063_rtc_read_time()
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| /linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | samsung,s5m8767.txt | 4 This is a part of device tree bindings for S5M family multi-function devices.
5 More information can be found in bindings/mfd/sec-core.txt file.
10 a sub-node named "regulators" with more sub-nodes for each regulator using the
12 - Documentation/devicetree/bindings/regulator/regulator.txt
16 - s5m8767,pmic-buck2-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
20 - s5m8767,pmic-buck3-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
24 - s5m8767,pmic-buck4-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
28 - s5m8767,pmic-buck-ds-gpios: GPIO specifiers for three host gpio's used
29 for selecting GPIO DVS lines. It is one-to-one mapped to dvs gpio lines.
31 [1] If none of the 's5m8767,pmic-buck[2/3/4]-uses-gpio-dvs' optional
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| /linux-5.10/arch/mips/lib/ |
| D | memcpy.S | 15 * Mnemonic names for arguments to memcpy/__copy_user
23 * dma-coherent systems.
36 #include <asm/asm-offsets.h>
49 * - src and dst don't overlap
50 * - src is readable
51 * - dst is writable
59 * - src is readable (no exceptions when reading src)
61 * - dst is writable (no exceptions when writing dst)
62 * __copy_user uses a non-standard calling convention; see
63 * include/asm-mips/uaccess.h
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| /linux-5.10/arch/powerpc/include/asm/nohash/ |
| D | mmu-book3e.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Freescale Book-E/Book-3e (ISA 2.06+) MMU support
8 /* Book-3e defined page sizes */
138 #define MMUCFG_PIDSIZE 0x000007c0 /* PID Reg Size */
142 #define MMUCFG_LPIDSIZE 0x0f000000 /* LPID Reg Size */
224 * The mapping only needs to be cache-coherent on SMP, except on
244 /* Page size definitions, common between 32 and 64-bit
268 return -1; in shift_to_mmu_psize()
278 /* The page sizes use the same names as 64-bit hash but are
292 * Per-core spinlock for e6500 TLB handlers (no tlbsrx.)
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| /linux-5.10/drivers/ntb/hw/intel/ |
| D | ntb_hw_gen1.h | 7 * Copyright(c) 2012-2017 Intel Corporation. All rights reserved.
15 * Copyright(c) 2012-2017 Intel Corporation. All rights reserved.
27 * * Neither the name of Intel Corporation nor the names of its
153 phys_addr_t reg_addr, unsigned long reg);
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| /linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | t2081si-post.dtsi | 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
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| /linux-5.10/drivers/staging/mt7621-pinctrl/ |
| D | pinctrl-rt2880.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/pinctrl/pinconf-generic.h>
19 #include <asm/mach-ralink/ralink_regs.h>
20 #include <asm/mach-ralink/pinmux.h>
21 #include <asm/mach-ralink/mt7620.h>
24 #include "pinctrl-utils.h"
50 return p->group_count; in rt2880_get_group_count()
58 return (group >= p->group_count) ? NULL : p->group_names[group]; in rt2880_get_group_name()
68 if (group >= p->group_count) in rt2880_get_group_pins()
69 return -EINVAL; in rt2880_get_group_pins()
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| /linux-5.10/drivers/iio/adc/ |
| D | adi-axi-adc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2012-2020 Analog Devices Inc.
21 #include <linux/iio/buffer-dmaengine.h>
23 #include <linux/fpga/adi-axi-common.h>
24 #include <linux/iio/adc/adi-axi-adc.h>
92 unsigned int reg, in adi_axi_adc_write() argument
95 iowrite32(val, st->regs + reg); in adi_axi_adc_write()
99 unsigned int reg) in adi_axi_adc_read() argument
101 return ioread32(st->regs + reg); in adi_axi_adc_read()
113 if (device_property_read_string(dev, "dma-names", &dma_name)) in adi_axi_adc_config_dma_buffer()
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| /linux-5.10/arch/mips/include/asm/sibyte/ |
| D | bcm1480_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * This module contains the addresses of the on-chip peripherals
10 * BCM1480 specification level: 1X55_1X80-UM100-D4 (11/24/03)
46 * User Manual, Document 1X55_1X80-UM100-R, 22/12/03.
56 * All BCM1480-specific symbols have _BCM1480_ in their names,
57 * and all BCM1250-specific and "base" functions that are common in
58 * both chips have no special names (this is for compatibility with
77 #define A_BCM1480_MC_REGISTER(ctlid, reg) (A_BCM1480_MC_BASE(ctlid)+(reg)) argument
159 * PCI-X Interface Registers (Section 7)
210 #define A_BCM1480_DUART_CHANREG(chan, reg) \ argument
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| /linux-5.10/arch/arc/include/asm/ |
| D | arcregs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
16 #define ARC_REG_FP_BCR 0x6B /* ARCompact: Single-Precision FPU */
63 * ECR: Exception Cause Reg bits-n-pieces
112 * Status regs are read-only (build-time) so need not be saved/restored
122 * DSP-related registers
123 * Registers names must correspond to dsp_callee_regs structure fields names
154 #define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10))
|
| /linux-5.10/drivers/media/dvb-frontends/ |
| D | stb6100.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
49 u8 reg; member
71 /* Register names for easy debugging. */
125 .addr = state->config->tuner_address, in stb6100_read_regs()
131 rc = i2c_transfer(state->i2c, &msg, 1); in stb6100_read_regs()
134 state->config->tuner_address, rc); in stb6100_read_regs()
136 return -EREMOTEIO; in stb6100_read_regs()
141 dprintk(verbose, FE_DEBUG, 1, " Read from 0x%02x", state->config->tuner_address); in stb6100_read_regs()
148 static int stb6100_read_reg(struct stb6100_state *state, u8 reg) in stb6100_read_reg() argument
153 .addr = state->config->tuner_address + reg, in stb6100_read_reg()
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| /linux-5.10/drivers/clk/st/ |
| D | clkgen-pll.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include <linux/clk-provider.h>
127 * prepare - clk_(un)prepare only ensures parent is (un)prepared
128 * enable - clk_enable/disable only ensures parent is enabled
129 * rate - rate is fixed. No clk_set_rate support
130 * parent - fixed parent. No clk_set_parent support
137 * @hw: handle between common and hardware-specific interfaces.
184 void __iomem *base = pll->regs_base; in __clkgen_pll_enable()
185 struct clkgen_field *field = &pll->data->locked_status; in __clkgen_pll_enable()
187 u32 reg; in __clkgen_pll_enable() local
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| /linux-5.10/include/linux/gpio/ |
| D | driver.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/pinctrl/pinconf-generic.h>
29 * struct gpio_irq_chip - GPIO interrupt controller
66 * If non-NULL, will be set as the parent of this GPIO interrupt
78 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
86 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
101 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
219 * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
272 * struct gpio_chip - abstract a GPIO controller
274 * number or the name of the SoC IP-block implementing it.
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| /linux-5.10/drivers/pinctrl/ |
| D | pinctrl-at91.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
26 #include "pinctrl-at91.h"
95 * struct at91_pmx_func - describes AT91 pinmux functions
115 * struct at91_pmx_pin - describes an At91 pin mux
129 * struct at91_pin_group - describes an At91 pin group
134 * from the driver-local pin enumeration space
146 * struct at91_pinctrl_mux_ops - describes an AT91 mux ops group
221 for (i = 0; i < info->ngroups; i++) { in at91_pinctrl_find_group_by_name()
222 if (strcmp(info->groups[i].name, name)) in at91_pinctrl_find_group_by_name()
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| /linux-5.10/drivers/block/ |
| D | swim3.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <linux/blk-mq.h>
55 #define REG(x) unsigned char x; char x ## _pad[15]; macro
58 * The names for these registers mostly represent speculation on my part.
59 * It will be interesting to see how close they are to the names Apple uses.
62 REG(data);
63 REG(timer); /* counts down at 1MHz */
64 REG(error);
65 REG(mode);
66 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
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