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/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mq-zii-ultra-zest.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include "imx8mq-zii-ultra.dtsi"
12 compatible = "zii,imx8mq-ultra-zest", "zii,imx8mq-ultra", "fsl,imx8mq";
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_ts>;
20 reg = <0x4a>;
21 interrupt-parent = <&gpio1>;
/linux-5.10/arch/arm64/boot/dts/realtek/
Drtd129x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
5 * Copyright (c) 2016-2019 Andreas Färber
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/realtek,rtd1295.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
Drtd139x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/realtek,rtd1295.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
25 reg = <0x2f000 0x1000>;
[all …]
/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt6797-evb.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
12 compatible = "mediatek,mt6797-evb", "mediatek,mt6797";
20 reg = <0 0x40000000 0 0x1e800000>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&uart0_pins_a>;
/linux-5.10/arch/arm/boot/dts/
Dorion5x-linkstation.dtsi7 * This file is dual-licensed: you can use it either under the terms
46 #include "orion5x-mv88f5182.dtsi"
51 stdout-path = &uart0;
61 compatible = "restart-poweroff";
65 compatible = "simple-bus";
66 #address-cells = <1>;
67 #size-cells = <0>;
68 pinctrl-0 = <&pmx_power_usb &pmx_power_hdd>;
69 pinctrl-names = "default";
72 compatible = "regulator-fixed";
[all …]
Dimx6qdl-tx6-lcd.dtsi2 * Copyright 2017 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
48 compatible = "pwm-backlight";
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_lcd1_pwr>;
52 enable-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;
53 power-supply = <&reg_3v3>;
54 turn-on-delay-ms = <35>;
59 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
70 default-brightness-level = <50>;
[all …]
Dimx6qdl-pico-hobbit.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 #include "imx6qdl-pico.dtsi"
9 compatible = "gpio-leds";
10 pinctrl-names = "default";
11 pinctrl-0 = <&pinctrl_gpio_leds>;
14 label = "gpio-led";
26 reg = <0x50>;
27 vref-supply = <&reg_3p3v>;
Ds5pv210-galaxys.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include "s5pv210-aries.dtsi"
9 model = "Samsung Galaxy S1 (GT-I9000) based on S5PV210";
13 stdout-path = &uart2;
16 nand_pwrseq: nand-pwrseq {
17 compatible = "mmc-pwrseq-simple";
18 reset-gpios = <&gpj2 7 GPIO_ACTIVE_LOW>;
[all …]
Dnspire-cx.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/boot/nspire-cx.dts
7 /dts-v1/;
14 remote-endpoint = <&panel_in>;
27 clock-names = "uart_clk", "apb_pclk";
39 compatible = "lsi,nspire-cx-clock";
43 compatible = "lsi,nspire-cx-ahb-divider";
77 model = "TI-NSPIRE CX";
78 compatible = "ti,nspire-cx";
82 reg = <0x10000000 0x4000000>; /* 64 MB */
[all …]
Domap3-gta04a5one.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
12 pinctrl-single,pins = <
43 pinctrl-names = "default";
44 pinctrl-0 = <&gpmc_pins>;
46 /delete-node/ nand@0,0;
50 #address-cells = <1>;
51 #size-cells = <1>;
52 compatible = "ti,omap2-onenand";
[all …]
Dsun4i-a10-pov-protab2-ips9.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun4i-a10.dtsi"
45 #include "sunxi-common-regulators.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
49 #include <dt-bindings/pwm/pwm.h>
52 model = "Point of View Protab2-IPS9";
53 compatible = "pov,protab2-ips9", "allwinner,sun4i-a10";
[all …]
/linux-5.10/drivers/gpio/
Dgpio-tps68470.c1 // SPDX-License-Identifier: GPL-2.0
32 struct regmap *regmap = tps68470_gpio->tps68470_regmap; in tps68470_gpio_get()
33 unsigned int reg = TPS68470_REG_GPDO; in tps68470_gpio_get() local
37 offset -= TPS68470_N_REGULAR_GPIO; in tps68470_gpio_get()
38 reg = TPS68470_REG_SGPO; in tps68470_gpio_get()
41 ret = regmap_read(regmap, reg, &val); in tps68470_gpio_get()
43 dev_err(tps68470_gpio->gc.parent, "reg 0x%x read failed\n", in tps68470_gpio_get()
54 struct regmap *regmap = tps68470_gpio->tps68470_regmap; in tps68470_gpio_get_direction()
63 dev_err(tps68470_gpio->gc.parent, "reg 0x%x read failed\n", in tps68470_gpio_get_direction()
77 struct regmap *regmap = tps68470_gpio->tps68470_regmap; in tps68470_gpio_set()
[all …]
/linux-5.10/Documentation/devicetree/bindings/mfd/
Drk808.txt11 - compatible: "rockchip,rk805"
12 - compatible: "rockchip,rk808"
13 - compatible: "rockchip,rk809"
14 - compatible: "rockchip,rk817"
15 - compatible: "rockchip,rk818"
16 - reg: I2C slave address
17 - interrupts: the interrupt outputs of the controller.
18 - #clock-cells: from common clock binding; shall be set to 1 (multiple clock
19 outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
22 - clock-output-names: From common clock binding to override the
[all …]
/linux-5.10/arch/arm64/boot/dts/renesas/
Dsalvator-x.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Salvator-X board
5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
8 #include "salvator-common.dtsi"
11 model = "Renesas Salvator-X board";
12 compatible = "renesas,salvator-x";
16 clock-frequency = <16666666>;
20 clock-frequency = <400000>;
22 versaclock5: clock-generator@6a {
24 reg = <0x6a>;
[all …]
Dsalvator-xs.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Salvator-X 2nd version board
5 * Copyright (C) 2015-2017 Renesas Electronics Corp.
8 #include "salvator-common.dtsi"
11 model = "Renesas Salvator-X 2nd version board";
12 compatible = "renesas,salvator-xs";
16 clock-frequency = <16640000>;
20 clock-frequency = <400000>;
22 versaclock6: clock-generator@6a {
24 reg = <0x6a>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/
Dsmsc-lan87xx.txt8 - clocks:
12 - smsc,disable-energy-detect:
19 pinctrl-names = "default", "sleep";
20 pinctrl-0 = <&davinci_mdio_default>;
21 pinctrl-1 = <&davinci_mdio_sleep>;
23 ethernetphy0: ethernet-phy@0 {
24 reg = <0>;
25 smsc,disable-energy-detect;
/linux-5.10/Documentation/devicetree/bindings/mmc/
Dbrcm,bcm2835-sdhost.txt7 - compatible: Should be "brcm,bcm2835-sdhost".
8 - clocks: The clock feeding the SDHOST controller.
11 - dmas: DMA channel for read and write.
17 compatible = "brcm,bcm2835-sdhost";
18 reg = <0x7e202000 0x100>;
22 dma-names = "rx-tx";
/linux-5.10/Documentation/devicetree/bindings/i2c/
Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp15-i2c
23 i2c-scl-rising-time-ns:
[all …]
/linux-5.10/arch/powerpc/xmon/
Dppc.h1 /* ppc.h -- Header file for PowerPC opcode table
2 Copyright (C) 1994-2016 Free Software Foundation, Inc.
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
88 (ie, compiler's -mcpu=common or assembler's -mcom). More than just
95 for the assembler's -many option, and it eliminates duplicates). */
101 /* Opcode is supported as part of the 64-bit bridge. */
164 /* Opcode is supported by Vector-Scalar (VSX) Unit */
211 /* Opcode is supported by Vector-Scalar (VSX) Unit from ISA 2.08. */
220 /* A macro to determine if the instruction is a 2-byte VLE insn. */
239 is shifted right by -SHIFT. Use PPC_OPSHIFT_INV to indicate
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/
Datmel,lcdc.txt2 -----------------------------------------------------
5 - compatible :
6 "atmel,at91sam9261-lcdc" ,
7 "atmel,at91sam9263-lcdc" ,
8 "atmel,at91sam9g10-lcdc" ,
9 "atmel,at91sam9g45-lcdc" ,
10 "atmel,at91sam9g45es-lcdc" ,
11 "atmel,at91sam9rl-lcdc" ,
12 "atmel,at32ap-lcdc"
13 - reg : Should contain 1 register ranges(address and length).
[all …]
/linux-5.10/drivers/bus/
Dbrcmstb_gisb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2017 Broadcom
59 [ARB_BP_CAP_HI_ADDR] = -1,
62 [ARB_BP_CAP_MASTER] = -1,
64 [ARB_ERR_CAP_HI_ADDR] = -1,
67 [ARB_ERR_CAP_MASTER] = -1,
73 [ARB_BP_CAP_HI_ADDR] = -1,
78 [ARB_ERR_CAP_HI_ADDR] = -1,
87 [ARB_BP_CAP_HI_ADDR] = -1,
92 [ARB_ERR_CAP_HI_ADDR] = -1,
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/tilcdc/
Dtilcdc.txt1 Device-Tree bindings for tilcdc DRM driver
4 - compatible: value should be one of the following:
5 - "ti,am33xx-tilcdc" for AM335x based boards
6 - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards
7 - interrupts: the interrupt number
8 - reg: base address and size of the LCDC device
11 - ti,hwmods: Name of the hwmod associated to the LCDC
14 - max-bandwidth: The maximum pixels per second that the memory
16 - max-width: The maximum horizontal pixel width supported by
18 - max-pixelclock: The maximum pixel clock that can be supported
[all …]
/linux-5.10/Documentation/devicetree/bindings/soc/qcom/
Dqcom,smsm.txt9 - compatible:
15 - qcom,ipc-N:
17 Value type: <prop-encoded-array>
20 - phandle to a syscon node representing the apcs registers
21 - u32 representing offset to the register within the syscon
22 - u32 representing the ipc bit within the register
24 - qcom,local-host:
32 - #address-cells:
37 - #size-cells:
44 Nodes can either be flagged as an interrupt-controller to denote a remote
[all …]
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dcnxt,cx92755-pinctrl.txt11 - compatible: Must be "cnxt,cx92755-pinctrl"
12 - reg: Base address of the General Purpose Pin Mapping register block and the
14 - gpio-controller: Marks the device node as a GPIO controller.
15 - #gpio-cells: Must be <2>. The first cell is the pin number and the
16 second cell is used to specify flags. See include/dt-bindings/gpio/gpio.h
22 compatible = "cnxt,cx92755-pinctrl";
23 reg = <0xf0000e20 0x100>;
24 gpio-controller;
25 #gpio-cells = <2>;
36 Each pin configuration node is a sub-node of the pin controller node and is a
[all …]
/linux-5.10/drivers/staging/axis-fifo/
Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
[all …]

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