Home
last modified time | relevance | path

Searched +full:reg +full:- +full:names (Results 3001 – 3025 of 3966) sorted by relevance

1...<<121122123124125126127128129130>>...159

/linux-5.10/arch/arm/boot/dts/
Ddove-d2plug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
12 reg = <0x00000000 0x40000000>;
20 compatible = "gpio-leds";
21 pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>;
22 pinctrl-names = "default";
24 wlan-ap {
25 label = "wlan-ap";
29 wlan-act {
30 label = "wlan-act";
[all …]
Dat91sam9260ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
16 stdout-path = &dbgu;
20 reg = <0x20000000 0x4000000>;
25 clock-frequency = <32768>;
29 clock-frequency = <18432000>;
37 compatible = "atmel,tcb-timer";
38 reg = <0>, <1>;
42 compatible = "atmel,tcb-timer";
43 reg = <2>;
[all …]
Dkirkwood-laplug.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
12 #include "kirkwood-6192.dtsi"
16 compatible = "lacie,laplug", "marvell,kirkwood-88f6192", "marvell,kirkwood";
20 reg = <0x00000000 0x8000000>; /* 128 MB */
25 stdout-path = &uart0;
39 reg = <0x50>;
43 pinctrl: pin-controller@10000 {
[all …]
Dtegra30-asus-nexus7-grouper-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/power/summit,smb347-charger.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
26 * pre-existing /chosen node to be available to insert the
32 reg = <0x80000000 0x40000000>;
35 reserved-memory {
[all …]
Domap3-igep0030-rev-g.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "omap3-igep0030-common.dtsi"
13 compatible = "isee,omap3-igep0030-rev-g", "ti,omap3630", "ti,omap36xx", "ti,omap3";
16 lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
17 compatible = "regulator-fixed";
18 regulator-name = "regulator-lbep5clwmc-wlen";
19 regulator-min-microvolt = <3300000>;
20 regulator-max-microvolt = <3300000>;
21 gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - WL_EN */
22 enable-active-high;
[all …]
Dam335x-base0033.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION
5 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
8 #include "am335x-igep0033.dtsi"
12 compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
17 pinctrl-names = "default", "off";
18 pinctrl-0 = <&nxp_hdmi_pins>;
19 pinctrl-1 = <&nxp_hdmi_off_pins>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&leds_base_pins>;
[all …]
Dqcom-ipq4019-ap.dk01.1.dtsi17 #include "qcom-ipq4019.dtsi"
20 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
28 stdout-path = "serial0:115200n8";
41 bias-disable;
56 drive-strength = <12>;
57 bias-disable;
61 drive-strength = <2>;
62 bias-disable;
63 output-high;
73 pinctrl-0 = <&spi_0_pins>;
[all …]
Dqcom-apq8064-cm-qs600.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 model = "CompuLab CM-QS600";
8 compatible = "qcom,apq8064-cm-qs600", "qcom,apq8064";
15 stdout-path = "serial0:115200n8";
19 #address-cells = <1>;
20 #size-cells = <1>;
22 compatible = "simple-bus";
[all …]
Dkeystone-k2l-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2l.dtsi"
13 compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/
Dsilabs,si570.txt8 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
12 https://www.silabs.com/Support%20Documents/TechnicalDocs/si598-99.pdf
15 - compatible: Shall be one of "silabs,si570", "silabs,si571",
17 - reg: I2C device address.
18 - #clock-cells: From common clock bindings: Shall be 0.
19 - factory-fout: Factory set default frequency. This frequency is part specific.
23 - temperature-stability: Temperature stability of the device in PPM. Should be
27 - clock-output-names: From common clock bindings. Recommended to be "si570".
28 - clock-frequency: Output frequency to generate. This defines the output
33 si570: clock-generator@5d {
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/
Dgemini.txt3 The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
20 - soc: the SoC should be represented by a simple bus encompassing all the
23 - syscon: the soc bus node must have a system controller node pointing to the
25 "cortina,gemini-syscon", "syscon";
28 - reg: syscon register location and size.
29 - #clock-cells: should be set to <1> - the system controller is also a
31 - #reset-cells: should be set to <1> - the system controller is also a
35 <dt-bindings/clock/cortina,gemini-clock.h>
38 <dt-bindings/reset/cortina,gemini-reset.h>
40 - timer: the soc bus node must have a timer node pointing to the SoC timer
[all …]
/linux-5.10/arch/powerpc/boot/dts/fsl/
Dt2080rdb.dts2 * T2080PCIe-RDB Board Device Tree Source
4 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
35 /include/ "t208xsi-pre.dtsi"
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
46 reg = <0xf 0xfe0c0000 0 0x11000>;
60 phy-handle = <&xg_aq1202_phy3>;
61 phy-connection-type = "xgmii";
[all …]
Dqoriq-raid1.0-0.dtsi14 * names of its contributors may be used to endorse or promote products
36 compatible = "fsl,raideng-v1.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x320000 0x10000>;
43 compatible = "fsl,raideng-v1.0-job-queue";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 reg = <0x1000 0x1000>;
50 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
[all …]
Dp1020utm-pc.dtsi2 * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges)
14 * names of its contributors may be used to endorse or promote products
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x2000000>;
41 bank-width = <2>;
42 device-width = <1>;
46 reg = <0x0 0x00040000>;
52 reg = <0x00040000 0x003c0000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mtd/
Dvf610-nfc.txt7 - compatible: Should be set to "fsl,vf610-nfc".
8 - reg: address range of the NFC.
9 - interrupts: interrupt of the NFC.
10 - #address-cells: shall be set to 1. Encode the nand CS.
11 - #size-cells : shall be set to 0.
12 - assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>;
13 - assigned-clock-rates: The NAND bus timing is derived from this clock
19 - #address-cells, #size-cells : Must be present if the device has sub-nodes
27 - compatible: Should be set to "fsl,vf610-nfc-cs".
28 - nand-bus-width: see nand-controller.yaml
[all …]
/linux-5.10/Documentation/devicetree/bindings/input/
Dimx-keypad.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/imx-keypad.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <gnuiyl@gmail.com>
13 - $ref: "/schemas/input/matrix-keymap.yaml#"
16 The KPP is designed to interface with a keypad matrix with 2-point contact
17 or 3-point contact keys. The KPP is designed to simplify the software task
24 - const: fsl,imx21-kpp
25 - items:
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mm-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2019-2020 NXP
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
9 #include "imx8mm-evk.dtsi"
13 compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
21 operating-points-v2 = <&ddrc_opp_table>;
23 ddrc_opp_table: opp-table {
24 compatible = "operating-points-v2";
26 opp-25M {
[all …]
/linux-5.10/arch/arm64/boot/dts/zte/
Dzx296718-pcbox.dts5 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
14 compatible = "zte,zx296718-pcbox", "zte,zx296718";
17 stdout-path = "serial0:115200n8";
22 reg = <0x80000000 0x80000000>;
25 a53_vdd0v9: regulator-a53 {
26 compatible = "pwm-regulator";
28 regulator-name = "A53_VDD0V9";
29 regulator-min-microvolt = <855000>;
[all …]
/linux-5.10/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor-lazor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 #include "sc7180-trogdor.dtsi"
17 compatible = "boe,nv133fhm-n62";
18 power-supply = <&pp3300_dx_edp>;
20 hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
25 remote-endpoint = <&sn65dsi86_out>;
38 clock-frequency = <400000>;
41 compatible = "hid-over-i2c";
42 reg = <0x10>;
43 pinctrl-names = "default";
[all …]
Dsc7180-trogdor-r1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
15 #include "sc7180-trogdor.dtsi"
23 power-supply = <&pp3300_dx_edp>;
25 hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
30 remote-endpoint = <&sn65dsi86_out>;
44 clock-frequency = <400000>;
48 reg = <0x10>;
49 pinctrl-names = "default";
50 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
[all …]
Dmsm8916-longcheer-l8150.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-pm8916.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
11 compatible = "longcheer,l8150", "qcom,msm8916-v1-qrd/9-v1", "qcom,msm8916";
18 stdout-path = "serial0";
21 reserved-memory {
23 /delete-node/ wcnss@89300000;
26 reg = <0x0 0x8b600000 0x0 0x600000>;
[all …]
/linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/
Dns2-xmc.dts16 * * Neither the name of Broadcom Corporation nor the names of its
33 /dts-v1/;
39 compatible = "brcm,ns2-xmc", "brcm,ns2";
46 stdout-path = "serial0:115200n8";
52 reg = <0x000000000 0x80000000 0x00000001 0x00000000>;
70 gphy0: eth-phy@10 {
71 reg = <0x10>;
79 reg = <0>;
80 nand-ecc-mode = "hw";
81 nand-ecc-strength = <8>;
[all …]
/linux-5.10/arch/mips/include/asm/sn/sn0/
Dhubio.h8 * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
22 * Slightly friendlier names for some common registers.
49 /* BTE register names */
57 #define IIO_BTE_OFF_1 IIO_IBLS_1 - IIO_IBLS_0 /* Offset from base to BTE 1 */
61 #define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
62 #define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
63 #define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
64 #define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
65 #define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
69 * The following definitions use the names defined in the IO interface
[all …]
/linux-5.10/arch/riscv/boot/dts/kendryte/
Dk210.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/k210-clk.h>
10 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
13 #address-cells = <1>;
14 #size-cells = <1>;
23 * Since this is a non-ratified draft specification, the kernel does not
28 #address-cells = <1>;
29 #size-cells = <0>;
30 timebase-frequency = <7800000>;
33 reg = <0>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mailbox/
Domap-mailbox.txt25 routed to different processor sub-systems on DRA7xx as they are routed through
35 a SoC. The sub-mailboxes are represented as child nodes of this parent node.
38 --------------------
39 - compatible: Should be one of the following,
40 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
41 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
42 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx,
44 "ti,am654-mailbox" for K3 AM65x and J721E SoCs
45 - reg: Contains the mailbox register address range (base
47 - interrupts: Contains the interrupt information for the mailbox
[all …]

1...<<121122123124125126127128129130>>...159