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/linux-5.10/Documentation/devicetree/bindings/phy/
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
[all …]
/linux-5.10/arch/arm/boot/dts/
Dvf610-cosmic.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 /dts-v1/;
12 compatible = "phytec,vf610-cosmic", "fsl,vf610";
20 reg = <0x80000000 0x10000000>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <50000000>;
32 clock-names = "sxosc", "fxosc", "enet_ext";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_esdhc1>;
[all …]
Dkirkwood-nsa320.dts1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
9 /dts-v1/;
11 #include "kirkwood-nsa3x0-common.dtsi"
15 compatible = "zyxel,nsa320", "marvell,kirkwood-88f6281", "marvell,kirkwood";
19 reg = <0x00000000 0x20000000>;
24 stdout-path = &uart0;
28 pinctrl: pin-controller@10000 {
29 pinctrl-names = "default";
32 pmx_sata0: pmx-sata0 {
[all …]
Ds5pv210-torbreck.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
12 * NOTE: This file is completely based on original board file for mach-torbreck
17 /dts-v1/;
18 #include <dt-bindings/input/input.h>
31 reg = <0x20000000 0x20000000>;
34 pmic_ap_clk: clock-0 {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <32768>;
[all …]
Domap5-igep0050.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz/
5 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include "omap5-board-common.dtsi"
12 compatible = "isee,omap5-igep0050", "ti,omap5";
16 reg = <0x0 0x80000000 0 0x7f000000>; /* 2032 MB */
24 compatible = "gpio-keys";
25 pinctrl-0 = <&power_button_pin>;
26 pinctrl-names = "default";
[all …]
Dimx7d-pico-hobbit.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "imx7d-pico.dtsi"
8 model = "TechNexion PICO-IMX7D Board using Hobbit baseboard";
9 compatible = "technexion,imx7d-pico-hobbit", "fsl,imx7d";
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 label = "gpio-led";
23 compatible = "simple-audio-card";
24 simple-audio-card,name = "imx7-sgtl5000";
[all …]
/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-milbeaut.txt7 - compatible: "socionext,milbeaut-m10v-sdhci-3.0"
8 - clocks: Must contain an entry for each entry in clock-names. It is a
9 list of phandles and clock-specifier pairs.
10 See ../clocks/clock-bindings.txt for details.
11 - clock-names: Should contain the following two entries:
12 "iface" - clock used for sdhci interface
13 "core" - core clock for sdhci controller
16 - fujitsu,cmd-dat-delay-select: boolean property indicating that this host
21 compatible = "socionext,milbeaut-m10v-sdhci-3.0";
22 reg = <0x1b010000 0x10000>;
[all …]
Ddavinci_mmc.txt9 - compatible:
10 Should be "ti,da830-mmc": for da830, da850, dm365
11 Should be "ti,dm355-mmc": for dm355, dm644x
14 - bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1>
15 - max-frequency: Maximum operating clock frequency, default 25MHz.
16 - dmas: List of DMA specifiers with the controller specific format
19 - dma-names: RX and TX DMA request names. These strings correspond
24 compatible = "ti,da830-mmc",
25 reg = <0x40000 0x1000>;
27 bus-width = <4>;
[all …]
/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3328-nanopi-r2s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
17 stdout-path = "serial2:1500000n8";
20 gmac_clk: gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/sound/
Dtas571x.txt9 - compatible: should be one of the following:
10 - "ti,tas5707"
11 - "ti,tas5711",
12 - "ti,tas5717",
13 - "ti,tas5719",
14 - "ti,tas5721"
15 - reg: The I2C address of the device
16 - #sound-dai-cells: must be equal to 0
20 - reset-gpios: GPIO specifier for the TAS571x's active low reset line
21 - pdn-gpios: GPIO specifier for the TAS571x's active low powerdown line
[all …]
Dwm8994.txt8 - compatible : One of "wlf,wm1811", "wlf,wm8994" or "wlf,wm8958".
10 - reg : the I2C address of the device for I2C, the chip select
13 - gpio-controller : Indicates this device is a GPIO controller.
14 - #gpio-cells : Must be 2. The first cell is the pin number and the
17 - power supplies for the device, as covered in
20 - for wlf,wm1811 and wlf,wm8958:
21 AVDD1-supply, AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply,
22 DCVDD-supply, CPVDD-supply, SPKVDD1-supply, SPKVDD2-supply
23 - for wlf,wm8994:
24 AVDD1-supply, AVDD2-supply, DBVDD-supply, DCVDD-supply, CPVDD-supply,
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/
Dbrcm,systemport.txt4 - compatible: should be one of:
5 "brcm,systemport-v1.00"
6 "brcm,systemportlite-v1.00" or
8 - reg: address and length of the register set for the device.
9 - interrupts: interrupts for the device, first cell must be for the rx
11 optional third interrupt cell for Wake-on-LAN can be specified
12 - local-mac-address: Ethernet MAC address (48 bits) of this adapter
13 - phy-mode: Should be a string describing the PHY interface to the
15 - fixed-link: see Documentation/devicetree/bindings/net/fixed-link.txt for
19 - systemport,num-tier2-arb: number of tier 2 arbiters, an integer
[all …]
Dhisilicon-femac.txt4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
15 - reset-names: should contain the reset signal name "mac"(required)
17 - phy-mode: see ethernet.txt [1].
[all …]
Dqca,qca7000.txt3 The QCA7000 is a serial-to-powerline bridge with a host interface which could
13 - compatible : Should be "qca,qca7000"
14 - reg : Should specify the SPI chip select
15 - interrupts : The first cell should specify the index of the source
18 - spi-cpha : Must be set
19 - spi-cpol : Must be set
22 - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at.
26 - qca,legacy-mode : Set the SPI data transfer of the QCA7000 to legacy mode.
40 #address-cells = <1>;
41 #size-cells = <0>;
[all …]
Damd-xgbe.txt1 * AMD 10GbE driver (amd-xgbe)
4 - compatible: Should be "amd,xgbe-seattle-v1a"
5 - reg: Address and length of the register sets for the device
6 - MAC registers
7 - PCS registers
8 - SerDes Rx/Tx registers
9 - SerDes integration registers (1/2)
10 - SerDes integration registers (2/2)
11 - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
13 amd,per-channel-interrupt property is specified, then one additional
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/
Damlogic,meson8b-clkc.txt8 - compatible: must be one of:
9 - "amlogic,meson8-clkc" for Meson8 (S802) SoCs
10 - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
11 - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
14 - clocks: list of clock phandles, one for each entry in clock-names
15 - clock-names: should contain the following:
21 - compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
22 - reg: base address and size of the HHI system control register space.
[all …]
/linux-5.10/Documentation/devicetree/bindings/dma/
Dnvidia,tegra210-adma.txt7 - compatible: Should contain one of the following:
8 - "nvidia,tegra210-adma": for Tegra210
9 - "nvidia,tegra186-adma": for Tegra186 and Tegra194
10 - reg: Should contain DMA registers location and length. This should be
11 a single entry that includes all of the per-channel registers in one
13 - interrupts: Should contain all of the per-channel DMA interrupts in
15 - clocks: Must contain one entry for the ADMA module clock
17 - clock-names: Must contain the name "d_audio" for the corresponding
19 - #dma-cells : Must be 1. The first cell denotes the receive/transmit
28 compatible = "nvidia,tegra210-adma";
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/
Dcoresight-cpu-debug.txt5 external debug module is mainly used for two modes: self-hosted debug and
8 debug module provides sample-based profiling extension, which can be used
14 - compatible : should be "arm,coresight-cpu-debug"; supplemented with
18 - reg : physical base address and length of the register set.
20 - clocks : the clock associated to this component.
22 - clock-names : the name of the clock referenced by the code. Since we are
29 - cpu : the CPU phandle the debug module is affined to. Do not assume it
34 - power-domains: a phandle to the debug power domain. We use "power-domains"
44 compatible = "arm,coresight-cpu-debug","arm,primecell";
45 reg = <0 0xf6590000 0 0x1000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mfd/
Domap-usb-host.txt5 - compatible: should be "ti,usbhs-host"
6 - reg: should contain one register range i.e. start and length
7 - ti,hwmods: must contain "usb_host_hs"
11 - num-ports: number of USB ports. Usually this is automatically detected
15 - portN-mode: String specifying the port mode for port N, where N can be
18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
21 "ohci-phy-6pin-datse0",
22 "ohci-phy-6pin-dpdm",
[all …]
Drohm,bd70528-pmic.txt3 BD70528MWV is an ultra-low quiescent current general purpose, single-chip,
4 power management IC for battery-powered portable devices. The IC
5 integrates 3 ultra-low current consumption buck converters, 3 LDOs and 2
6 LED Drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz
7 clock gate, high-accuracy VREF for use with an external ADC, flexible
8 dual-input power path, 10 bit SAR ADC for battery temperature monitor and
12 - compatible : Should be "rohm,bd70528"
13 - reg : I2C slave address.
14 - interrupts : The interrupt line the device is connected to.
15 - interrupt-controller : To indicate BD70528 acts as an interrupt controller.
[all …]
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-mt7622.txt4 - compatible: Should be one of the following
5 "mediatek,mt7622-pinctrl" for MT7622 SoC
6 "mediatek,mt7629-pinctrl" for MT7629 SoC
7 - reg: offset and length of the pinctrl space
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells: Should be two. The first cell is the pin number and the
14 - interrupt-controller : Marks the device node as an interrupt controller
16 If the property interrupt-controller is defined, following property is required
17 - reg-names: A string describing the "reg" entries. Must contain "eint".
18 - interrupts : The interrupt output from the controller.
[all …]
/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-meson.txt5 - compatible: Shall contain "amlogic,meson8b-pwm"
6 or "amlogic,meson-gxbb-pwm"
7 or "amlogic,meson-gxbb-ao-pwm"
8 or "amlogic,meson-axg-ee-pwm"
9 or "amlogic,meson-axg-ao-pwm"
10 or "amlogic,meson-g12a-ee-pwm"
11 or "amlogic,meson-g12a-ao-pwm-ab"
12 or "amlogic,meson-g12a-ao-pwm-cd"
13 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
17 - clocks: Could contain one or two parents clocks phandle for each of the two
[all …]
/linux-5.10/Documentation/devicetree/bindings/gpio/
Dsocionext,uniphier-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 pattern: "^gpio@[0-9a-f]+$"
17 const: socionext,uniphier-gpio
19 reg:
22 gpio-controller: true
24 "#gpio-cells":
[all …]
/linux-5.10/drivers/clk/renesas/
Dclk-rz.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 #include <linux/clk-provider.h>
20 void __iomem *reg; member
31 /* -----------------------------------------------------------------------------
67 /* If mapping regs failed, skip non-pll clocks. System will boot anyhow */ in rz_cpg_register_clock()
68 if (!cpg->reg) in rz_cpg_register_clock()
69 return ERR_PTR(-ENXIO); in rz_cpg_register_clock()
71 /* FIXME:"i" and "g" are variable clocks with non-integer dividers (e.g. 2/3) in rz_cpg_register_clock()
76 val = (readl(cpg->reg + CPG_FRQCR) >> 8) & 3; in rz_cpg_register_clock()
[all …]
/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Darm,pl172.txt5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
[all …]

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