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/linux-6.15/Documentation/devicetree/bindings/mailbox/
Daltera-mailbox.txt5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
12 - interrupts : interrupt number. The interrupt specifier format
17 compatible = "altr,mailbox-1.0";
18 reg = <0x100 0x8>;
19 interrupt-parent = < &gic_0 >;
21 #mbox-cells = <1>;
25 compatible = "altr,mailbox-1.0";
26 reg = <0x200 0x8>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/pci/
Dmicrochip,pcie-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/microchip,pcie-host.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daire McNamara <daire.mcnamara@microchip.com>
13 - $ref: plda,xpressrich3-axi-common.yaml#
14 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
18 const: microchip,pcie-host-1.0 # PolarFire
20 reg:
23 reg-names:
[all …]
/linux-6.15/Documentation/devicetree/bindings/sound/
Dwlf,wm8904.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
20 - wlf,wm8904
21 - wlf,wm8912
23 reg:
26 "#sound-dai-cells":
32 clock-names:
35 AVDD-supply: true
[all …]
/linux-6.15/arch/arm/boot/dts/intel/pxa/
Dpxa3xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
21 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
23 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
33 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
[all …]
/linux-6.15/Documentation/devicetree/bindings/clock/
Damlogic,meson8-ddr-clkc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
15 - amlogic,meson8-ddr-clkc
16 - amlogic,meson8b-ddr-clkc
18 reg:
24 clock-names:
26 - const: xtal
[all …]
Dallwinner,sun4i-a10-apb0-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb0-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
20 const: allwinner,sun4i-a10-apb0-clk
22 reg:
28 clock-output-names:
[all …]
Dallwinner,sun4i-a10-pll3-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll3-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
20 const: allwinner,sun4i-a10-pll3-clk
22 reg:
28 clock-output-names:
[all …]
Dallwinner,sun9i-a80-pll4-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-pll4-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
20 const: allwinner,sun9i-a80-pll4-clk
22 reg:
28 clock-output-names:
[all …]
Damlogic,s4-pll-clkc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved
4 ---
5 $id: http://devicetree.org/schemas/clock/amlogic,s4-pll-clkc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yu Tu <yu.tu@amlogic.com>
15 const: amlogic,s4-pll-clkc
17 reg:
23 clock-names:
25 - const: xtal
[all …]
Dnxp,lpc3220-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nxp,lpc3220-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
14 const: nxp,lpc3220-clk
16 reg:
19 '#clock-cells':
25 - description: External 32768 Hz oscillator.
26 - description: Optional high frequency oscillator.
[all …]
/linux-6.15/arch/riscv/boot/dts/thead/
Dth1520-lichee-module-4a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
12 compatible = "sipeed,lichee-module-4a", "thead,th1520";
21 reg = <0x0 0x00000000 0x2 0x00000000>;
26 clock-frequency = <24000000>;
30 clock-frequency = <32768>;
34 gpio-line-names = "", "", "",
44 bus-width = <8>;
45 max-frequency = <198000000>;
46 mmc-hs400-1_8v;
[all …]
/linux-6.15/Documentation/devicetree/bindings/phy/
Dstarfive,jh7110-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Minda Chen <minda.chen@starfivetech.com>
14 const: starfive,jh7110-usb-phy
16 reg:
19 "#phy-cells":
24 - description: PHY 125m
25 - description: app 125m
[all …]
/linux-6.15/Documentation/devicetree/bindings/i2c/
Di2c-mxs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mxs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - fsl,imx23-i2c
19 - fsl,imx28-i2c
21 reg:
27 clock-frequency:
[all …]
/linux-6.15/arch/arm/boot/dts/nxp/imx/
Dimx6qdl-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Copyright 2014-2022 Toradex
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pwm/pwm.h>
17 /delete-property/ mmc2;
18 /delete-property/ mmc3;
22 compatible = "pwm-backlight";
23 brightness-levels = <0 45 63 88 119 158 203 255>;
24 default-brightness-level = <4>;
25 enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
[all …]
/linux-6.15/Documentation/devicetree/bindings/hwlock/
Dst,stm32-hwspinlock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwlock/st,stm32-hwspinlock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabien Dessenne <fabien.dessenne@foss.st.com>
13 "#hwlock-cells":
17 const: st,stm32-hwspinlock
19 reg:
25 clock-names:
27 - const: hsem
[all …]
/linux-6.15/Documentation/devicetree/bindings/fpga/
Dxilinx-zynq-fpga-mgr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xilinx-zynq-fpga-mgr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michal Simek <michal.simek@amd.com>
14 const: xlnx,zynq-devcfg-1.0
16 reg:
25 clock-names:
27 - const: ref_clk
35 - compatible
[all …]
/linux-6.15/arch/arm/boot/dts/marvell/
Darmada-385-linksys.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "armada-385.dtsi"
18 stdout-path = "serial0:115200n8";
23 reg = <0x00000000 0x20000000>; /* 512 MiB */
34 usb3_1_phy: usb3_1-phy {
35 compatible = "usb-nop-xceiv";
36 vcc-supply = <&usb3_1_vbus>;
37 #phy-cells = <0>;
[all …]
/linux-6.15/drivers/gpio/
Dgpio-reg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * gpio-reg: single register individually fixed-direction GPIOs
19 #include <linux/gpio/gpio-reg.h>
26 void __iomem *reg; member
37 return r->direction & BIT(offset) ? GPIO_LINE_DIRECTION_IN : in gpio_reg_get_direction()
46 if (r->direction & BIT(offset)) in gpio_reg_direction_output()
47 return -ENOTSUPP; in gpio_reg_direction_output()
49 gc->set(gc, offset, value); in gpio_reg_direction_output()
57 return r->direction & BIT(offset) ? 0 : -ENOTSUPP; in gpio_reg_direction_input()
66 spin_lock_irqsave(&r->lock, flags); in gpio_reg_set()
[all …]
/linux-6.15/Documentation/devicetree/bindings/remoteproc/
Dqcom,q6v5.txt6 - compatible:
10 "qcom,ipq8074-wcss-pil"
11 "qcom,qcs404-wcss-pil"
13 - reg:
15 Value type: <prop-encoded-array>
19 - reg-names:
24 - interrupts-extended:
26 Value type: <prop-encoded-array>
27 Definition: reference to the interrupts that match interrupt-names
29 - interrupt-names:
[all …]
/linux-6.15/arch/arm64/boot/dts/qcom/
Dsc8280xp-microsoft-arcata.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "sc8280xp-pmics.dtsi"
23 wcd938x: audio-codec {
24 compatible = "qcom,wcd9380-codec";
26 pinctrl-0 = <&wcd_default>;
27 pinctrl-names = "default";
29 reset-gpios = <&tlmm 106 GPIO_ACTIVE_LOW>;
[all …]
Dmsm8996-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include <dt-bindings/sound/qcom,wcd9335.h>
23 compatible = "simple-battery";
25 constant-charge-current-max-microamp = <3000000>;
26 voltage-min-design-microvolt = <3400000>;
30 stdout-path = "serial1:115200n8";
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
[all …]
/linux-6.15/arch/arm64/boot/dts/actions/
Ds900.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/actions,s900-cmu.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/actions,s900-reset.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <2>;
19 #size-cells = <0>;
[all …]
/linux-6.15/arch/arm64/boot/dts/ti/
Dk3-j7200-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
10 #include "k3-j7200.dtsi"
15 bootph-all;
17 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
21 reserved_memory: reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/watchdog/
Dsamsung-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/watchdog/samsung-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
20 - enum:
21 - google,gs101-wdt # for Google gs101
22 - samsung,s3c2410-wdt # for S3C2410
23 - samsung,s3c6410-wdt # for S3C6410, S5PV210 and Exynos4
24 - samsung,exynos5250-wdt # for Exynos5250
[all …]

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