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/linux-5.10/Documentation/devicetree/bindings/interconnect/
Dqcom,msm8974.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8974 Network-On-Chip Interconnect
10 - Brian Masney <masneyb@onstation.org>
14 bandwidth requirements between various network-on-chip fabrics.
17 reg:
22 - qcom,msm8974-bimc
23 - qcom,msm8974-cnoc
24 - qcom,msm8974-mmssnoc
[all …]
Dqcom,osm-l3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <sibis@codeaurora.org>
20 - qcom,sc7180-osm-l3
21 - qcom,sdm845-osm-l3
22 - qcom,sm8150-osm-l3
23 - qcom,sm8250-epss-l3
25 reg:
[all …]
/linux-5.10/Documentation/devicetree/bindings/mtd/
Darasan,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/arasan,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "nand-controller.yaml"
13 - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
18 - enum:
19 - xlnx,zynqmp-nand-controller
20 - const: arasan,nfc-v3p10
22 reg:
[all …]
/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dfsl,imx7d-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
14 const: fsl,imx7d-adc
16 reg:
25 clock-names:
28 vref-supply: true
30 "#io-channel-cells":
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/
Dallwinner,sun9i-a80-usb-mod-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-mod-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
22 "#reset-cells":
26 const: allwinner,sun9i-a80-usb-mod-clk
28 reg:
[all …]
Dallwinner,sun9i-a80-usb-phy-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-phy-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
22 "#reset-cells":
26 const: allwinner,sun9i-a80-usb-phy-clk
28 reg:
[all …]
/linux-5.10/Documentation/devicetree/bindings/crypto/
Dallwinner,sun8i-ss.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/crypto/allwinner,sun8i-ss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Corentin Labbe <corentin.labbe@gmail.com>
15 - allwinner,sun8i-a83t-crypto
16 - allwinner,sun9i-a80-crypto
18 reg:
26 - description: Bus clock
27 - description: Module clock
[all …]
Dinside-secure-safexcel.txt4 - compatible: Should be "inside-secure,safexcel-eip197b",
5 "inside-secure,safexcel-eip197d" or
6 "inside-secure,safexcel-eip97ies".
7 - reg: Base physical address of the engine and length of memory mapped region.
8 - interrupts: Interrupt numbers for the rings and engine.
9 - interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".
12 - clocks: Reference to the crypto engine clocks, the second clock is
14 - clock-names: mandatory if there is a second clock, in this case the
15 name must be "core" for the first clock and "reg" for
21 - "inside-secure,safexcel-eip197" is equivalent to
[all …]
/linux-5.10/arch/arm/boot/dts/
Dpxa910.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,pxa910.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
28 L2: l2-cache {
29 compatible = "marvell,tauros2-cache";
[all …]
Dimx28-cfa10058.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * The CFA-10058 is an expansion board for the CFA-10036 module, thus we
9 * need to include the CFA-10036 DTS.
11 #include "imx28-cfa10036.dts"
14 model = "Crystalfontz CFA-10058 Board";
20 usb_pins_cfa10058: usb-10058@0 {
21 reg = <0>;
22 fsl,pinmux-ids = <
25 fsl,drive-strength = <MXS_DRIVE_4mA>;
27 fsl,pull-up = <MXS_PULL_DISABLE>;
[all …]
Dimx6ul-imx6ull-opos6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 reg = <0x80000000 0>; /* will be filled by U-Boot */
11 reg_3v3: regulator-3v3 {
12 compatible = "regulator-fixed";
13 regulator-name = "3V3";
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
18 usdhc3_pwrseq: usdhc3-pwrseq {
19 compatible = "mmc-pwrseq-simple";
20 reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
[all …]
Dlpc4350-hitex-eval.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
38 reg = <0x28000000 0x800000>; /* 8 MB */
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
97 compatible = "gpio-leds";
[all …]
Drk3288-r89.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/pwm/pwm.h>
17 reg = <0x0 0x0 0x0 0x80000000>;
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "ext_gmac";
24 #clock-cells = <0>;
[all …]
Dlogicpd-som-lv.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/input/input.h>
8 cpu0-supply = <&vcc>;
14 reg = <0x80000000 0>;
18 compatible = "regulator-fixed";
19 regulator-name = "vwl1271";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
23 startup-delay-us = <70000>;
24 enable-active-high;
[all …]
Dimx23-xfi3.dts2 * Copyright (C) 2013-2016 Marek Vasut <marek.vasut@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
48 model = "Creative ZEN X-Fi3";
49 compatible = "creative,x-fi3", "fsl,imx23";
53 reg = <0x40000000 0x04000000>;
59 compatible = "fsl,imx23-mmc";
60 pinctrl-names = "default";
61 pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>;
62 bus-width = <4>;
[all …]
Dkeystone-k2g-ice.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
9 #include "keystone-k2g.dtsi"
10 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
18 reg = <0x00000008 0x00000000 0x00000000 0x20000000>;
21 reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
[all …]
Dimx53-m53.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
10 compatible = "aries,imx53-m53", "denx,imx53-m53", "fsl,imx53";
14 reg = <0x70000000 0x20000000>,
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "regulator-fixed";
25 reg = <0>;
26 regulator-name = "3P2V";
27 regulator-min-microvolt = <3200000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dsprd-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
17 - sprd,sc9860-mailbox
19 reg:
21 - description: inbox registers' base address
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/
Dingenic,ipu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
15 - enum:
16 - ingenic,jz4725b-ipu
17 - ingenic,jz4760-ipu
18 - items:
19 - const: ingenic,jz4770-ipu
20 - const: ingenic,jz4760-ipu
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Dinno_hdmi-rockchip.txt5 - compatible:
6 "rockchip,rk3036-inno-hdmi";
7 - reg:
9 - clocks, clock-names:
11 - interrupts:
13 - ports:
16 - pinctrl-0, pinctrl-name:
21 compatible = "rockchip,rk3036-inno-hdmi";
22 reg = <0x20034000 0x4000>;
25 clock-names = "pclk";
[all …]
/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-samsung.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
17 outputs - see SoC and board manual).
24 - samsung,s3c2410-pwm # 16-bit, S3C24xx
25 - samsung,s3c6400-pwm # 32-bit, S3C64xx
26 - samsung,s5p6440-pwm # 32-bit, S5P64x0
[all …]
/linux-5.10/Documentation/devicetree/bindings/iio/
Diio-bindings.txt2 from Lars-Peter Clausen [1].
10 value of a #io-channel-cells property in the IIO provider node.
12 [1] https://marc.info/?l=linux-iio&m=135902119507483&w=2
17 #io-channel-cells: Number of cells in an IIO specifier; Typically 0 for nodes
27 adc: voltage-sensor@35 {
29 reg = <0x35>;
30 #io-channel-cells = <1>;
37 compatible = "some-vendor,some-adc";
38 reg = <0x35>;
40 adc1: iio-device@0 {
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mq-hummingboard-pulse.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
6 /dts-v1/;
8 #include "dt-bindings/usb/pd.h"
9 #include "imx8mq-sr-som.dtsi"
13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
16 stdout-path = &uart1;
19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
20 compatible = "regulator-fixed";
21 pinctrl-names = "default";
[all …]
Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
15 stdout-path = &uart2;
18 gpio-leds {
19 compatible = "gpio-leds";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_gpio_led>;
26 default-state = "on";
32 reg = <0x0 0x40000000 0 0xc0000000>,
[all …]
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dabilis,tb10x-iomux.txt5 -------------------
7 - compatible: should be "abilis,tb10x-iomux";
8 - reg: should contain the physical address and size of the pin controller's
13 --------------------
15 Functions are defined (and referenced) by sub-nodes of the pin controller.
16 Every sub-node defines exactly one function (implying a set of pins).
18 driver and these names are used to associate pin group predefinitions to pin
19 controller sub-nodes.
22 - abilis,function: should be set to the name of the function's pin group.
25 - GPIO ports: gpioa, gpiob, gpioc, gpiod, gpioe, gpiof, gpiog,
[all …]

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