Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,pxa910.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
28 L2: l2-cache {
29 compatible = "marvell,tauros2-cache";
30 marvell,tauros2-cache-features = <0x3>;
34 compatible = "mrvl,axi-bus", "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <1>;
37 reg = <0xd4200000 0x00200000>;
40 intc: interrupt-controller@d4282000 {
41 compatible = "mrvl,mmp-intc";
42 interrupt-controller;
43 #interrupt-cells = <1>;
44 reg = <0xd4282000 0x1000>;
45 mrvl,intc-nr-irqs = <64>;
51 compatible = "mrvl,apb-bus", "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 reg = <0xd4000000 0x00200000>;
58 compatible = "mrvl,mmp-timer";
59 reg = <0xd4014000 0x100>;
64 compatible = "mrvl,mmp-timer";
65 reg = <0xd4016000 0x100>;
71 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
72 reg = <0xd4017000 0x1000>;
73 reg-shift = <2>;
81 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
82 reg = <0xd4018000 0x1000>;
83 reg-shift = <2>;
91 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
92 reg = <0xd4036000 0x1000>;
93 reg-shift = <2>;
101 compatible = "marvell,mmp-gpio";
102 #address-cells = <1>;
103 #size-cells = <1>;
104 reg = <0xd4019000 0x1000>;
105 gpio-controller;
106 #gpio-cells = <2>;
108 interrupt-names = "gpio_mux";
111 interrupt-controller;
112 #interrupt-cells = <2>;
116 reg = <0xd4019000 0x4>;
120 reg = <0xd4019004 0x4>;
124 reg = <0xd4019008 0x4>;
128 reg = <0xd4019100 0x4>;
133 compatible = "mrvl,mmp-twsi";
134 #address-cells = <1>;
135 #size-cells = <0>;
136 reg = <0xd4011000 0x1000>;
140 mrvl,i2c-fast-mode;
145 compatible = "mrvl,mmp-twsi";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 reg = <0xd4037000 0x1000>;
156 compatible = "mrvl,mmp-rtc";
157 reg = <0xd4010000 0x1000>;
159 interrupt-names = "rtc 1Hz", "rtc alarm";
167 compatible = "marvell,pxa910-clock";
168 reg = <0xd4050000 0x1000>,
172 reg-names = "mpmu", "apmu", "apbc", "apbcp";
173 #clock-cells = <1>;
174 #reset-cells = <1>;