Home
last modified time | relevance | path

Searched +full:reg +full:- +full:names (Results 1201 – 1225 of 3208) sorted by relevance

1...<<41424344454647484950>>...129

/linux-6.15/Documentation/devicetree/bindings/rtc/
Drenesas,rzn1-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/renesas,rzn1-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/N1 SoCs Real-Time Clock
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: rtc.yaml#
18 - enum:
19 - renesas,r9a06g032-rtc
20 - const: renesas,rzn1-rtc
[all …]
/linux-6.15/Documentation/devicetree/bindings/mailbox/
Dsprd-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
17 - sprd,sc9860-mailbox
18 - sprd,sc9863a-mailbox
20 reg:
[all …]
/linux-6.15/Documentation/devicetree/bindings/sound/
Dxlnx,audio-formatter.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/xlnx,audio-formatter.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The IP core supports DMA, data formatting(AES<->PCM conversion)
14 - Vincenzo Frascino <vincenzo.frascino@arm.com>
17 - $ref: dai-common.yaml#
22 - xlnx,audio-formatter-1.0
24 reg:
27 interrupt-names:
[all …]
Dnvidia,tegra20-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Thierry Reding <treding@nvidia.com>
16 - Jon Hunter <jonathanh@nvidia.com>
20 const: nvidia,tegra20-i2s
22 reg:
28 reset-names:
40 dma-names:
[all …]
Dst,stm32-spdifrx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
14 IEC-60958 and IEC-61937.
17 - $ref: dai-common.yaml#
22 - st,stm32h7-spdifrx
24 "#sound-dai-cells":
27 reg:
[all …]
/linux-6.15/arch/arm/boot/dts/microchip/
Dsama5d3xmb.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
20 reg = <0>;
21 bus-width = <4>;
22 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
31 spi-max-frequency = <50000000>;
32 reg = <0>;
37 atmel,clk-from-rk-pin;
[all …]
/linux-6.15/Documentation/devicetree/bindings/display/
Drenesas,du.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Display Unit (DU)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the Display Unit embedded in the Renesas R-Car
14 Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,du-r8a7742 # for RZ/G1H compatible DU
20 - renesas,du-r8a7743 # for RZ/G1M compatible DU
21 - renesas,du-r8a7744 # for RZ/G1N compatible DU
[all …]
/linux-6.15/Documentation/devicetree/bindings/mtd/
Dst-fsm.txt1 * ST-Microelectronics SPI FSM Serial (NOR) Flash Controller
4 - compatible : Should be "st,spi-fsm"
5 - reg : Contains register's location and length.
6 - reg-names : Should contain the reg names "spi-fsm"
7 - interrupts : The interrupt number
8 - pinctrl-0 : Standard Pinctrl phandle (see: pinctrl/pinctrl-bindings.txt)
11 - st,syscfg : Phandle to boot-device system configuration registers
12 - st,boot-device-reg : Address of the aforementioned boot-device register(s)
13 - st,boot-device-spi : Expected boot-device value if booted via this device
17 compatible = "st,spi-fsm";
[all …]
/linux-6.15/arch/arm64/boot/dts/freescale/
Dimx93-14x14-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 compatible = "fsl,imx93-14x14-evk", "fsl,imx93";
16 stdout-path = &lpuart1;
19 reserved-memory {
20 #address-cells = <2>;
21 #size-cells = <2>;
25 compatible = "shared-dma-pool";
27 alloc-ranges = <0 0x80000000 0 0x40000000>;
[all …]
/linux-6.15/arch/arm/boot/dts/nxp/imx/
Dimx6qdl-emcon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/input/input.h>
12 model = "emtrion SoM emCON-MX6";
13 compatible = "emtrion,emcon-mx6";
23 stdout-path = &uart1;
28 reg = <0x10000000 0x40000000>;
31 gpio-keys {
32 compatible = "gpio-keys";
[all …]
Dimx7-mba7.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Device Tree Include file for TQ-Systems MBa7 carrier board.
5 * Copyright (C) 2016 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/net/ti-dp83867.h>
20 /delete-property/ mmc2;
26 compatible = "gpio-beeper";
31 stdout-path = &uart6;
34 gpio_buttons: gpio-keys {
[all …]
/linux-6.15/arch/arm64/boot/dts/ti/
Dk3-am62p5-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree file for the AM62P5-SK
4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/net/ti-dp83867.h>
14 #include "k3-am62p5.dtsi"
17 compatible = "ti,am62p5-sk", "ti,am62p5";
36 stdout-path = &main_uart0;
[all …]
/linux-6.15/arch/arm/boot/dts/ti/omap/
Domap4-epson-embt2ws.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/input/input.h>
12 model = "Epson Moverio BT-200";
17 reg = <0x80000000 0x40000000>; /* 1024M */
21 compatible = "simple-battery";
22 device-chemistry = "lithium-ion";
23 charge-full-design-microamp-hours = <2720000>;
24 voltage-max-design-microvolt = <4200000>;
[all …]
/linux-6.15/arch/arm/boot/dts/xilinx/
Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
25 reg = <0x0 0x40000000>;
30 stdout-path = "serial0:115200n8";
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
40 ps-clk-frequency = <33333333>;
[all …]
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
26 reg = <0x0 0x40000000>;
31 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
[all …]
/linux-6.15/arch/arm64/boot/dts/qcom/
Dx1e80100-dell-xps13-9345.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 #include "x1e80100-pmics.dtsi"
20 compatible = "dell,xps13-9345", "qcom,x1e80100";
21 chassis-type = "laptop";
[all …]
/linux-6.15/arch/arm/boot/dts/marvell/
Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
27 next-level-cache = <&l2>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/phy/
Drockchip,rk3228-hdmi-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,rk3228-hdmi-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3228-hdmi-phy
16 - rockchip,rk3328-hdmi-phy
18 reg:
24 clock-names:
26 - const: sysclk
[all …]
/linux-6.15/Documentation/devicetree/bindings/serial/
Dqcom,serial-geni-qcom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 - $ref: /schemas/serial/serial.yaml#
19 - qcom,geni-uart
20 - qcom,geni-debug-uart
25 clock-names:
[all …]
/linux-6.15/Documentation/devicetree/bindings/pci/
Dqcom,pcie-x1e80100.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-x1e80100.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-x1e80100
21 reg:
25 reg-names:
27 - const: parf # Qualcomm specific registers
[all …]
/linux-6.15/Documentation/devicetree/bindings/display/msm/
Ddsi-phy-7nm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Marek <jonathan@marek.ca>
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-7nm
19 - qcom,dsi-phy-7nm-8150
20 - qcom,sc7280-dsi-phy-7nm
21 - qcom,sm6375-dsi-phy-7nm
[all …]
Ddsi-phy-28nm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-28nm-8226
19 - qcom,dsi-phy-28nm-8937
20 - qcom,dsi-phy-28nm-8960
21 - qcom,dsi-phy-28nm-hpm
[all …]
Ddsi-phy-14nm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-14nm
19 - qcom,dsi-phy-14nm-2290
20 - qcom,dsi-phy-14nm-660
21 - qcom,dsi-phy-14nm-8953
[all …]
/linux-6.15/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-mod0-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
20 - allwinner,sun4i-a10-mod0-clk
21 - allwinner,sun9i-a80-mod0-clk
23 # The PRCM on the A31 and A23 will have the reg property missing,
27 - compatible
[all …]
Dsamsung,exynos7-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos7-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
18 - "fin_pll" - PLL input clock from XXTI
[all …]

1...<<41424344454647484950>>...129