Searched +full:reg +full:- +full:names (Results 1176 – 1200 of 3162) sorted by relevance
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/linux-6.15/arch/arm64/boot/dts/freescale/ |
D | imx8mp-verdin.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 7 #include <dt-bindings/pwm/pwm.h> 12 stdout-path = &uart3; 24 compatible = "pwm-backlight"; 25 brightness-levels = <0 45 63 88 119 158 203 255>; 26 default-brightness-level = <4>; 28 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>; [all …]
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D | imx8mn-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "imx8mn-overdrive.dtsi" 16 compatible = "mmc-pwrseq-simple"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&pinctrl_usdhc1_gpio>; 19 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 21 clock-names = "ext_clock"; 22 post-power-on-delay-ms = <80>; 27 reg = <0x0 0x40000000 0 0x80000000>; 32 cpu-supply = <&buck2_reg>; [all …]
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D | imx8mm-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "imx8mm-overdrive.dtsi" 15 compatible = "mmc-pwrseq-simple"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_usdhc1_gpio>; 18 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 20 clock-names = "ext_clock"; 21 post-power-on-delay-ms = <80>; 26 reg = <0x0 0x40000000 0 0x80000000>; 31 cpu-supply = <&buck2_reg>; [all …]
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D | imx8mm-nitrogen-r2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 11 compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; 13 reg_vref_1v8: regulator-vref-1v8 { 14 compatible = "regulator-fixed"; 15 regulator-name = "vref-1v8"; 16 regulator-min-microvolt = <1800000>; 17 regulator-max-microvolt = <1800000>; 20 reg_vref_3v3: regulator-vref-3v3 { 21 compatible = "regulator-fixed"; [all …]
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/linux-6.15/Documentation/devicetree/bindings/net/ |
D | loongson,ls1b-gmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/loongson,ls1b-gmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1B Gigabit Ethernet MAC Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1B Gigabit Ethernet MAC Controller is based on 17 - Dual 10/100/1000Mbps GMAC controllers 18 - Full-duplex operation (IEEE 802.3x flow control automatic transmission) 19 - Half-duplex operation (CSMA/CD Protocol and back-pressure support) [all …]
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D | loongson,ls1c-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/loongson,ls1c-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1C Ethernet MAC Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1C Ethernet MAC Controller is based on 17 - 10/100Mbps 18 - Full-duplex operation (IEEE 802.3x flow control automatic transmission) 19 - Half-duplex operation (CSMA/CD Protocol and back-pressure support) [all …]
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/linux-6.15/arch/arm/boot/dts/microchip/ |
D | at91-sama5d27_wlsom1.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1 11 #include "sama5d2-pinfunc.h" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/mfd/atmel-flexcom.h> 14 #include <dt-bindings/pinctrl/at91.h> 18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; 26 clock-frequency = <32768>; 30 clock-frequency = <24000000>; 34 reg_5v: regulator-5v { [all …]
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/linux-6.15/arch/arm64/boot/dts/xilinx/ |
D | zynqmp-zc1751-xm016-dc2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm016-dc2 RevA"; 20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; [all …]
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/linux-6.15/Documentation/devicetree/bindings/display/rockchip/ |
D | rockchip-vop.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Sandy Huang <hjc@rock-chips.com> 16 - Heiko Stuebner <heiko@sntech.de> 21 - rockchip,px30-vop-big 22 - rockchip,px30-vop-lit 23 - rockchip,rk3036-vop 24 - rockchip,rk3066-vop [all …]
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/linux-6.15/Documentation/devicetree/bindings/mfd/ |
D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - advanced-control timers consist of a 16-bit auto-reload counter driven 14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter 16 - basic timers consist of a 16-bit auto-reload counter driven by a 20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 25 - st,stm32-timers 26 - st,stm32mp25-timers [all …]
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D | brcm,cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rafał Miłecki <rafal@milecki.pl> 20 - enum: 21 - brcm,ns-cru 22 - const: simple-mfd 24 reg: 29 "#address-cells": 32 "#size-cells": [all …]
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D | atmel,hlcdc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nicolas Ferre <nicolas.ferre@microchip.com> 11 - Alexandre Belloni <alexandre.belloni@bootlin.com> 12 - Claudiu Beznea <claudiu.beznea@tuxon.dev> 21 - atmel,at91sam9n12-hlcdc 22 - atmel,at91sam9x5-hlcdc 23 - atmel,sama5d2-hlcdc 24 - atmel,sama5d3-hlcdc [all …]
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/linux-6.15/Documentation/devicetree/bindings/soc/ti/ |
D | keystone-navigator-dma.txt | 13 ------------------ 15 ------------------ 17 |-> DMA instance #0 19 |-> DMA instance #1 23 |-> DMA instance #n 27 - compatible: Should be "ti,keystone-navigator-dma" 28 - clocks: phandle to dma instances clocks. The clock handles can be as 31 - ti,navigator-cloud-address: Should contain base address for the multi-core 42 - reg: Should contain register location and length of the following dma 45 - Global control register region (global). [all …]
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/linux-6.15/Documentation/devicetree/bindings/media/ |
D | qcom,sc7280-camss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/qcom,sc7280-camss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Azam Sadiq Pasha Kapatrala Syed <akapatra@quicinc.com> 11 - Hariram Purushothaman <hariramp@quicinc.com> 18 const: qcom,sc7280-camss 20 reg: 23 reg-names: 25 - const: csid0 [all …]
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D | ti,j721e-csi2rx-shim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/ti,j721e-csi2rx-shim.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 enables sending captured frames to memory over PSI-L DMA. In the J721E 16 - Jai Luthra <jai.luthra@linux.dev> 20 const: ti,j721e-csi2rx-shim 25 dma-names: 27 - const: rx0 29 reg: [all …]
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/linux-6.15/Documentation/devicetree/bindings/power/reset/ |
D | qcom,pon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 14 and resin along with the Android reboot-mode. 21 - qcom,pm8916-pon 22 - qcom,pm8941-pon 23 - qcom,pms405-pon 24 - qcom,pm8998-pon 25 - qcom,pmk8350-pon [all …]
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/linux-6.15/arch/arm/boot/dts/ti/omap/ |
D | omap36xx-omap3430es2plus-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 10 reg = <0xa00>; 11 #clock-cells = <2>; 12 #address-cells = <1>; 13 #size-cells = <0>; 15 ssi_ssr_gate_fck_3430es2: clock-ssi-ssr-gate-fck-3430es2@0 { 16 reg = <0>; 17 #clock-cells = <0>; 18 compatible = "ti,composite-no-wait-gate-clock"; 19 clock-output-names = "ssi_ssr_gate_fck_3430es2"; [all …]
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/linux-6.15/Documentation/devicetree/bindings/sound/ |
D | qcom,wcd9335.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC with in-built 21 reg: 27 clock-names: 29 - const: mclk 30 - const: slimbus 35 interrupt-names: [all …]
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/linux-6.15/Documentation/devicetree/bindings/pci/ |
D | sifive,fu740-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml. 16 - Paul Walmsley <paul.walmsley@sifive.com> 17 - Greentime Hu <greentime.hu@sifive.com> 20 - $ref: /schemas/pci/snps,dw-pcie.yaml# 24 const: sifive,fu740-pcie 26 reg: [all …]
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/linux-6.15/arch/arm64/boot/dts/arm/ |
D | foundation-v8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 model = "Foundation-v8A"; 16 compatible = "arm,foundation-aarch64", "arm,vexpress"; 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 stdout-path = "serial0:115200n8"; 33 #address-cells = <2>; [all …]
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/linux-6.15/Documentation/devicetree/bindings/gpu/host1x/ |
D | nvidia,tegra210-nvenc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Thierry Reding <treding@gmail.com> 16 - Mikko Perttunen <mperttunen@nvidia.com> 20 pattern: "^nvenc@[0-9a-f]*$" 24 - nvidia,tegra210-nvenc 25 - nvidia,tegra186-nvenc 26 - nvidia,tegra194-nvenc [all …]
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/linux-6.15/Documentation/devicetree/bindings/phy/ |
D | rockchip,px30-dsi-dphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,px30-dsi-dphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 13 "#phy-cells": 18 - rockchip,px30-dsi-dphy 19 - rockchip,rk3128-dsi-dphy 20 - rockchip,rk3368-dsi-dphy 21 - rockchip,rk3568-dsi-dphy [all …]
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D | amlogic,g12a-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/amlogic,g12a-usb2-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 16 - amlogic,g12a-usb2-phy 17 - amlogic,a1-usb2-phy 19 reg: 25 clock-names: 27 - const: xtal [all …]
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/linux-6.15/Documentation/devicetree/bindings/clock/ |
D | qcom,hfpll.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm High-Frequency PLL 10 - Bjorn Andersson <andersson@kernel.org> 18 - enum: 19 - qcom,msm8974-hfpll 20 - qcom,msm8976-hfpll-a53 21 - qcom,msm8976-hfpll-a72 22 - qcom,msm8976-hfpll-cci [all …]
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/linux-6.15/Documentation/devicetree/bindings/usb/ |
D | ingenic,musb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Paul Cercueil <paul@crapouillou.net> 18 - enum: 19 - ingenic,jz4770-musb 20 - ingenic,jz4740-musb 21 - items: 22 - const: ingenic,jz4725b-musb 23 - const: ingenic,jz4740-musb [all …]
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